testing rem irq with mail_noise

This commit is contained in:
Simon Pickartz 2011-08-23 14:45:08 -07:00
parent 47deea941a
commit c5befddfdf
4 changed files with 66 additions and 50 deletions

View file

@ -42,6 +42,7 @@ extern bootinfo_t* bootinfo;
enum icc_mail_requests {
PING_REQ=1,
PING_RESP,
NOISE,
};

View file

@ -292,6 +292,7 @@ int iRCCE_mail_recv(
flags = irq_nested_disable();
help_header = iRCCE_mailbox_recv_queue[i].first;
iRCCE_mailbox_recv_queue[i].first =
@ -316,6 +317,9 @@ int iRCCE_mail_recv(
// no mail queued
*header = NULL;
/* enable interrupts */
irq_nested_enable(flags);
return iRCCE_MAILBOX_EMPTY;
}

View file

@ -228,9 +228,9 @@ int icc_halt(void)
return 0;
}
#define ROUNDS 1000
#define CORE_A 0 // sender
#define CORE_B 1 // receiver
#define ROUNDS 10000
#define CORE_A 0 // sender
#define CORE_B 4 // receiver
int icc_send_gic_irq(int core_num) {
@ -256,6 +256,9 @@ int icc_irq_ping()
static inline void icc_mail_check_tag(iRCCE_MAIL_HEADER* mail) {
char* recv_buffer;
static int count = 0;
if( !mail ) return;
switch( mail->tag ) {
case iRCCE_ANYLENGTH:
recv_buffer = (char*)kmalloc( mail->size );
@ -264,13 +267,15 @@ static inline void icc_mail_check_tag(iRCCE_MAIL_HEADER* mail) {
break;
case PING_REQ:
// kprintf( "%d ", count );
count++;
// kprintf( "PING_REQ" );
// count++;
iRCCE_mail_send(0, PING_RESP, 0, NULL, mail->source);
break;
case NOISE:
// kprintf( "XXX " );
default:
kprintf( "icc_mail_check_tag: uknown tag id %d\n", mail->tag );
// kprintf( "icc_mail_check_tag: uknown tag id %d\n", mail->tag );
break;
}
@ -372,6 +377,7 @@ int icc_mail_ping_irq( void )
// disable interrupts
flags = irq_nested_disable();
for( i=0; i<ROUNDS+1; ++i ) {
/* send ping request */
iRCCE_mail_send(0, PING_REQ, 0, NULL, CORE_B);
@ -384,18 +390,9 @@ int icc_mail_ping_irq( void )
res = iRCCE_mail_check(CORE_B);
} while( res != iRCCE_SUCCESS );
recv_header = NULL;
/* release mail */
do {
if( recv_header ) iRCCE_mail_release(&recv_header);
res = iRCCE_mail_recv(&recv_header);
} while( (recv_header->source != CORE_B)
&& (recv_header->tag == PING_RESP) );
if( !(i%1000) ) kprintf( "%d ", i );
iRCCE_mail_recv(&recv_header);
iRCCE_mail_release(&recv_header);
/* start timer in first round */
if( i == 0 ) timer = rdtsc();
@ -415,41 +412,50 @@ int icc_mail_ping_irq( void )
int icc_mail_noise() {
int j, res;
int i, j, res;
int num_ranks = RCCE_num_ues();
iRCCE_MAIL_HEADER* recv_mail = NULL;
int flags;
// leave function if not participating
if( (my_ue == CORE_A) /*(my_ue == CORE_B)*/ ) {
if( (my_ue == CORE_A) /* || (my_ue == CORE_B) */ || (my_ue > 25) ) {
kprintf( "mail_noise: leaving" );
return -1;
}
kprintf( "Hello from icc_mail_noise: my_ue = %d\n", my_ue );
for( ;; ) {
kprintf( "num_ues = %d\n", num_ranks );
int count = 0;
for( i=0; i<100000 ;++i ) {
/* send a mail to each UE */
for( j=0; j<num_ranks; ++j ) {
if( (j == CORE_A) || (j == CORE_B) )
if( (j == CORE_A) || /*(j == CORE_B) || */(j > 25) )
continue;
/* recv mails */
iRCCE_mail_check(iRCCE_MAILBOX_ALL);
/* send noise mail */
iRCCE_mail_send(0, 100, 0, NULL, j);
iRCCE_mail_send(0, NOISE, 1, NULL, j);
icc_send_gic_irq(j);
NOP8;
NOP8;
NOP8;
}
/* read some mails
if( !(i%1000) ) {
iRCCE_mail_send(0, NOISE, 0, NULL, j);
}
/* read some mails */
for( res = iRCCE_mail_recv(&recv_mail), j=0; (res == iRCCE_SUCCESS) && (j<48); res = iRCCE_mail_recv(&recv_mail), ++j ) {
while( iRCCE_mail_recv(&recv_mail) == iRCCE_SUCCESS ) {
icc_mail_check_tag(recv_mail);
iRCCE_mail_release(&recv_mail);
}
*/
kprintf( "x " );
}
return 0;
}
@ -462,44 +468,49 @@ int icc_mail_noise() {
void icc_mail_check(int irq)
{
iRCCE_MAIL_HEADER* header = NULL;
int source, res;
int i, source, res;
volatile uint64_t* irq_status_reg = NULL;
volatile uint64_t* irq_reset_reg = NULL;
uint64_t irq_status = 0;
uint64_t irq_reset = 0;
uint32_t flags;
/* disable interrupts */
flags = irq_nested_disable();
if( irq == 1 ) {
/* read status register */
irq_status_reg = (volatile uint64_t*)(FPGA_BASE + IRQ_STATUS + my_ue*8);
irq_status = *irq_status_reg;
for( i=0; i<2; ++i ) {
/* read status register */
irq_status_reg = (volatile uint64_t*)(FPGA_BASE + IRQ_STATUS + my_ue*8);
irq_status = irq_reset = *irq_status_reg;
/* determine interrupt sources */
irq_status >>= 6; // shift emac bits
/* determine interrupt sources */
irq_status >>= 6; // shift emac bits
for( source = 0; irq_status != 0; irq_status >>= 1, ++source ) {
if( (irq_status & 0x1) != 0 ) {
res = iRCCE_mail_check(source);
for( source = 0; irq_status != 0; irq_status >>= 1, ++source ) {
if( (irq_status & 0x1) != 0 ) {
res = iRCCE_mail_check(source);
}
}
}
/* reset status register */
irq_reset_reg = (volatile uint64_t*)(FPGA_BASE + IRQ_RESET + my_ue*8);
*irq_reset_reg = ~(0);
/* reset status register */
irq_reset_reg = (volatile uint64_t*)(FPGA_BASE + IRQ_RESET + my_ue*8);
*irq_reset_reg = irq_reset;
}
}
else {
iRCCE_mail_check(iRCCE_MAILBOX_ALL);
}
/* empty mail queue */
while( (res = iRCCE_mail_recv(&header)) == iRCCE_SUCCESS ) {
i=0;
// while( (i<10) && (res = iRCCE_mail_recv(&header)) == iRCCE_SUCCESS) {
iRCCE_mail_recv(&header);
icc_mail_check_tag(header);
iRCCE_mail_release( &header );
}
// }
/* enable interrupts */
irq_nested_enable(flags);

View file

@ -104,7 +104,7 @@ static int mail_ping(void* arg) {
// icc_mail_ping();
icc_mail_ping_irq();
// icc_irq_ping();
icc_halt();
// icc_halt();
return 0;
}