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add the support of the memory type MPBT

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=> seesection "10.1.2 Internal Cache Changes" of SCC External Architecture Specification (R1.1)
This commit is contained in:
Stefan Lankes 2011-04-05 23:43:44 -07:00
parent e599063dd2
commit f0e4a2b833
5 changed files with 28 additions and 3 deletions
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1
arch/x86/include/asm/page.h
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@ -48,6 +48,7 @@
#define PG_ACCESSED (1 << _PAGE_BIT_ACCESSED)
#define PG_DIRTY (1 << _PAGE_BIT_DIRTY)
#define PG_PSE (1 << _PAGE_BIT_PSE)
#define PG_MPE PG_PSE
#define PG_GLOBAL (1 << _PAGE_BIT_GLOBAL)
#define PG_RESERVED (1 << _PAGE_BIT_RESERVED)
#define PG_PAT (1 << _PAGE_BIT_PAT)

10
arch/x86/include/asm/processor.h
View file

@ -113,6 +113,16 @@ static inline void write_cr3(uint32_t val) {
asm volatile("mov %0, %%cr3" : : "r"(val));
}
static inline uint32_t read_cr4(void) {
uint32_t val;
asm volatile("mov %%cr4, %0" : "=r"(val));
return val;
}
static inline void write_cr4(uint32_t val) {
asm volatile("mov %0, %%cr4" : : "r"(val));
}
static inline void tlb_flush_one_page(uint32_t addr)
{
asm volatile("invlpg (%0)" : : "r"(addr) : "memory");

8
arch/x86/mm/page.c
View file

@ -339,6 +339,10 @@ size_t map_region(size_t viraddr, size_t phyaddr, uint32_t npages, uint32_t flag
if (flags & MAP_NO_CACHE)
pgt->entries[index] |= PG_PCD;
#ifdef CONFIG_ROCKCREEK
if (flags & MAP_MPE)
pgt->entries[index] |= PG_MPE;
#endif
if (flags & MAP_USER_SPACE)
atomic_int32_inc(&task->user_usage);
@ -684,8 +688,8 @@ int arch_paging_init(void)
viraddr = map_region(CRB_X0_Y0, CRB_X0_Y0, (CRB_OWN-CRB_X0_Y0+16*1024*1024)/PAGE_SIZE, MAP_KERNEL_SPACE|MAP_NO_CACHE);
kprintf("Map configuration registers at 0x%x\n", viraddr);
// map SCC's configuration registers
viraddr = map_region(MPB_X0_Y0, MPB_X0_Y0, (MPB_OWN-MPB_X0_Y0+16*1024*1024)/PAGE_SIZE, MAP_KERNEL_SPACE);
// map SCC's message passing buffers
viraddr = map_region(MPB_X0_Y0, MPB_X0_Y0, (MPB_OWN-MPB_X0_Y0+16*1024*1024)/PAGE_SIZE, MAP_KERNEL_SPACE|MAP_MPE);
kprintf("Map message passing buffers at 0x%x\n", viraddr);
#endif

8
arch/x86/scc/scc_init.c
View file

@ -27,6 +27,9 @@
#ifdef CONFIG_ROCKCREEK
/* PSE bit for Pentium+ equals MPE (message buffer enable) flag in RCK! So, use it to create _PAGE_MPB symbol... */
#define _CR4_MPE 0x00000800
/*
* Workaround to create a suitable argv array
*/
@ -83,6 +86,11 @@ int scc_init(void)
num_ranks = RCCE_num_ues();
kprintf("Got rank %d of %d ranks\n", my_rank, num_ranks);
/* Enable Messagepassing in CR4 */
uint32_t cr4 = read_cr4();
cr4 = cr4 | _CR4_MPE;
write_cr4(cr4);
i = ReadConfigReg(CRB_OWN+GLCFG0);
kprintf("glcfg0 0x%x\n", i);

4
include/metalsvm/stdlib.h
View file

@ -36,7 +36,9 @@ extern "C" {
#define MAP_HEAP (1 << 5)
#define MAP_CODE (1 << 6)
#define MAP_READONLY (1 << 7)
#ifdef CONFIG_ROCKCREEK
#define MAP_MPE (1 << 8)
#endif
void NORETURN abort(void);
void* kmalloc(size_t);
void* mem_allocation(size_t sz, uint32_t flags);