47 lines
2.2 KiB
C
47 lines
2.2 KiB
C
/**
|
|
* @file doxy_mainpage.h
|
|
* @mainpage
|
|
*
|
|
* @section Introduction
|
|
*
|
|
* On a traditional multicore system, a single operating system
|
|
* manages all cores and schedules threads and processes among
|
|
* them, inherently supported by hardware-implemented cache
|
|
* coherence protocols. However, a further growth of the number
|
|
* of cores per system implies an increasing chip complexity,
|
|
* especially with respect to the cache coherence protocols.
|
|
* Therefore, a very attractive alternative for future many-core
|
|
* systems is to waive the hardware-based cache coherency and to
|
|
* introduce a software-oriented message-passing based architecture
|
|
* instead: a so-called Cluster-on-Chip architecture.
|
|
* Intel's Single-chip Cloud Computer (SCC), a many-core research
|
|
* processor with 48 non-coherent memory-coupled cores, is a very
|
|
* recent example for such a Cluster-on-Chip architecture. The SCC
|
|
* can be configured to run one operating system per core by
|
|
* partitioning the shared main memory in a strict manner. However,
|
|
* it is also possible to access the shared main memory in an unsplit
|
|
* and concurrent manner, provided that the cache coherency is then
|
|
* ensured by software.
|
|
*
|
|
* @section Research Objective
|
|
*
|
|
* In this project, we develop a new approach for a SCC-related shared
|
|
* virtual memory management system, called MetalSVM, that will be
|
|
* implemented in terms of a bare-metal hypervisor, located within a
|
|
* virtualization layer between the SCC's hardware and the actual
|
|
* operating system. This new hypervisor will undertake the crucial
|
|
* task of coherency management by utilizing special SCC-related features
|
|
* as, for example, its on-die Message-Passing Buffers (MPB). That way,
|
|
* common Linux kernels will be able to run almost transparently across
|
|
* the entire SCC system. However, in order to offer a maximum of flexibility
|
|
* with respect to resource allocation as well as to an efficiency-adjusted
|
|
* degree of parallelism, also a dynamic partitioning of the SCC's computing
|
|
* resources into several coherency domains will be made possible.
|
|
*
|
|
* @image html metalsvm_stack.jpg
|
|
*
|
|
* @section Acknowledgment
|
|
*
|
|
* This research project is funded by Intel Corporation.
|
|
*
|
|
*/
|