5a4bd9a069
Changed some stuff in the doxyfile and added a directory structure for future manual pages.
47 lines
2.2 KiB
Text
47 lines
2.2 KiB
Text
/**
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* @file mainpage.dox
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* @mainpage
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*
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* @section Introduction
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*
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* On a traditional multicore system, a single operating system
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* manages all cores and schedules threads and processes among
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* them, inherently supported by hardware-implemented cache
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* coherence protocols. However, a further growth of the number
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* of cores per system implies an increasing chip complexity,
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* especially with respect to the cache coherence protocols.
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* Therefore, a very attractive alternative for future many-core
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* systems is to waive the hardware-based cache coherency and to
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* introduce a software-oriented message-passing based architecture
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* instead: a so-called Cluster-on-Chip architecture.
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* Intel's Single-chip Cloud Computer (SCC), a many-core research
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* processor with 48 non-coherent memory-coupled cores, is a very
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* recent example for such a Cluster-on-Chip architecture. The SCC
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* can be configured to run one operating system per core by
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* partitioning the shared main memory in a strict manner. However,
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* it is also possible to access the shared main memory in an unsplit
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* and concurrent manner, provided that the cache coherency is then
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* ensured by software.
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*
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* @section Research Objective
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*
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* In this project, we develop a new approach for a SCC-related shared
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* virtual memory management system, called MetalSVM, that will be
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* implemented in terms of a bare-metal hypervisor, located within a
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* virtualization layer between the SCC's hardware and the actual
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* operating system. This new hypervisor will undertake the crucial
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* task of coherency management by utilizing special SCC-related features
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* as, for example, its on-die Message-Passing Buffers (MPB). That way,
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* common Linux kernels will be able to run almost transparently across
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* the entire SCC system. However, in order to offer a maximum of flexibility
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* with respect to resource allocation as well as to an efficiency-adjusted
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* degree of parallelism, also a dynamic partitioning of the SCC's computing
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* resources into several coherency domains will be made possible.
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*
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* @image html metalsvm_stack.jpg
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*
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* @section Acknowledgment
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*
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* This research project is funded by Intel Corporation.
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*
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*/
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