134 lines
3.3 KiB
C
134 lines
3.3 KiB
C
/*
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* Copyright 2010 Stefan Lankes, Chair for Operating Systems,
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* RWTH Aachen University
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR COND */
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#include <metalsvm/stdio.h>
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#include <metalsvm/errno.h>
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#include <metalsvm/processor.h>
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#include <metalsvm/errno.h>
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#include <asm/io.h>
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#include <asm/RCCE.h>
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#include <asm/iRCCE.h>
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#include <asm/SCC_API.h>
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#ifdef CONFIG_ROCKCREEK
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bootinfo_t* bootinfo = (bootinfo_t*) SCC_BOOTINFO;
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/* PSE bit for Pentium+ equals MPE (message buffer enable) flag in RCK! So, use it to create _PAGE_MPB symbol... */
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#define _CR4_MPE 0x00000800
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/*
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* This is the modified MPB program, which is part of the RCCE distribution (src/mpb.c).
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*
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* This function clears the local MPB and resets the test&set register.
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*/
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static int scc_clear(void)
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{
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int tmp, x, y, z, offset;
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// Initialize API
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InitAPI(0);
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// Find out who I am...
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tmp=ReadConfigReg(CRB_OWN+MYTILEID);
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x=(tmp>>3) & 0x0f; // bits 06:03
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y=(tmp>>7) & 0x0f; // bits 10:07
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z=(tmp ) & 0x07; // bits 02:00
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// Allocate Message Passing Buffer
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t_vcharp MPB;
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MPBalloc(&MPB, x, y, z, 1);
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if (!MPB) {
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kprintf("Unable to allocate MPB for core %d of Tile x=%d, y= %d! Exiting.\n", z, x, y);
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return 255;
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}
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// zap own MPB
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for (offset=0; offset < 0x2000; offset+=8)
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*(volatile unsigned long long int*)(MPB+offset) = 0;
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// Clear test&set register write. Next read-access will read "1" (lock granted).
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SetConfigReg(CRB_ADDR(x,y)+((z)?LOCK1:LOCK0), 1);
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// frees Message Passing Buffer
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MPBunalloc(&MPB);
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return 0;
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}
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int scc_init(void)
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{
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int num_ranks;
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int i, my_rank;
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uint64_t start, end, ticks, freq = 533;
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uint32_t cr4, msg = 0;
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kputs("Initialize Rock Creek!\n");
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/* Enable Messagepassing in CR4 */
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cr4 = read_cr4();
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cr4 = cr4 | _CR4_MPE;
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write_cr4(cr4);
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kprintf("address of the initrd: 0x%x\n", bootinfo->addr);
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kprintf("size of the initrd: %d\n", bootinfo->size);
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kprintf("rcce argc = %d\n", bootinfo->argc);
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for(i=0; i<bootinfo->argc; i++)
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kprintf("rcce argv[%d] = %s\n", i, bootinfo->argv[i]);
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if (bootinfo->argc >= 3)
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freq = atoi(bootinfo->argv[2]);
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kputs("Reset SCC!\n");
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scc_clear();
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kputs("Wait some time...\n");
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mb();
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start = rdtsc();
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do {
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mb();
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end = rdtsc();
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ticks = end > start ? end - start : start - end;
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} while(ticks*TIMER_FREQ < 300ULL*freq*1000000ULL);
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if (RCCE_init(&bootinfo->argc, &bootinfo->argv) != RCCE_SUCCESS)
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return -ENODEV;
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if (iRCCE_init() != iRCCE_SUCCESS)
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return -ENODEV;
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// enable additional outputs
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RCCE_debug_set(RCCE_DEBUG_ALL);
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my_rank = RCCE_ue();
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num_ranks = RCCE_num_ues();
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kprintf("Got rank %d of %d ranks\n", my_rank, num_ranks);
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i = ReadConfigReg(CRB_OWN+GLCFG0);
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kprintf("glcfg0 0x%x\n", i);
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RCCE_barrier(&RCCE_COMM_WORLD);
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kputs("RCCE test...\t");
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if (my_rank == 0)
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msg = 0x4711;
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if (RCCE_bcast((char*) &msg, sizeof(msg), 0, RCCE_COMM_WORLD) == RCCE_SUCCESS)
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kprintf("successfull! (0x%x)\n", msg);
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else
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kprintf("failed! (0x%x)\n", msg);
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kputs("Now, the SCC is initialized!\n");
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return 0;
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}
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#endif
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