yosys/tests/sat/asserts.ys

read_verilog -sv asserts.v
hierarchy; proc; opt
sat -verify -seq 1 -set-at 1 rst 1 -tempinduct -prove-asserts
Added read_verilog -sv options, added support for bit, logic, allways_ff, always_comb, and always_latch 2014-06-12 11:54:20 +02:00			`read_verilog -sv asserts.v`
Added test cases for sat command 2014-02-04 13:43:34 +01:00			`hierarchy; proc; opt`
			`sat -verify -seq 1 -set-at 1 rst 1 -tempinduct -prove-asserts`