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Merge branch 'master' of github.com:cliffordwolf/yosys

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Clifford Wolf 2016-09-08 11:17:05 +02:00
commit 2c0d818296
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2
passes/memory/memory_share.cc
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@ -753,7 +753,7 @@ struct MemorySharePass : public Pass {
log("\n");
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design) {
log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrc/$memwr cells).\n");
log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n");
extra_args(args, 1, design);
for (auto module : design->selected_modules())
MemoryShareWorker(design, module);