From 52a738a54435d9e54ac7cb523551ae866cc76770 Mon Sep 17 00:00:00 2001
From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Mon, 11 Jul 2016 22:45:55 -0700
Subject: [PATCH] Added GP_DAC cell

---
 techlibs/greenpak4/cells_sim.v | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index bf178a08..ca8556a8 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -120,6 +120,14 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT,
 
 endmodule
 
+module GP_DAC(input[7:0] DIN, input wire VREF, output reg VOUT);
+
+	initial VOUT = 0;
+
+	//analog hard IP is not supported for simulation
+
+endmodule
+
 module GP_DELAY(input IN, output reg OUT);
 	
 	parameter DELAY_STEPS = 1;