diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc
index 766c1c65..6936b499 100644
--- a/passes/techmap/shregmap.cc
+++ b/passes/techmap/shregmap.cc
@@ -112,7 +112,7 @@ struct ShregmapWorker
 	{
 		for (auto wire : module->wires())
 		{
-			if (wire->port_output) {
+			if (wire->port_output || wire->get_bool_attribute("\\keep")) {
 				for (auto bit : sigmap(wire))
 					sigbit_with_non_chain_users.insert(bit);
 			}
@@ -130,7 +130,7 @@ struct ShregmapWorker
 
 		for (auto cell : module->cells())
 		{
-			if (opts.ffcells.count(cell->type))
+			if (opts.ffcells.count(cell->type) && !cell->get_bool_attribute("\\keep"))
 			{
 				IdString d_port = opts.ffcells.at(cell->type).first;
 				IdString q_port = opts.ffcells.at(cell->type).second;