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Smaller default parameters in $mem simlib model

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This commit is contained in:
Clifford Wolf 2015-02-15 00:20:05 +01:00
parent c6ae9ebb79
commit ec05242c27
1 changed files with 2 additions and 2 deletions
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4
techlibs/common/simlib.v
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@ -1539,9 +1539,9 @@ endmodule
module \$mem (RD_CLK, RD_ADDR, RD_DATA, WR_CLK, WR_EN, WR_ADDR, WR_DATA);
parameter MEMID = "";
parameter SIZE = 256;
parameter SIZE = 4;
parameter OFFSET = 0;
parameter ABITS = 8;
parameter ABITS = 2;
parameter WIDTH = 8;
parameter signed INIT = 1'bx;