Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
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Clifford Wolf
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4c4b602156
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Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
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Clifford Wolf
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f9946232ad
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Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
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Clifford Wolf
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d68c993ed2
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Changed more code to the new RTLIL::Wire constructors
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2014-07-26 21:30:38 +02:00 |
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Clifford Wolf
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946ddff9ce
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Changed a lot of code to the new RTLIL::Wire constructors
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2014-07-26 20:12:50 +02:00 |
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Clifford Wolf
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3f4e3ca8ad
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More RTLIL::Cell API usage cleanups
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2014-07-26 16:14:02 +02:00 |
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Clifford Wolf
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97a59851a6
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Added RTLIL::Cell::has(portname)
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2014-07-26 16:11:28 +02:00 |
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Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
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Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
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Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
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Clifford Wolf
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4755e14e7b
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Added copy-constructor-like module->addCell(name, other) method
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2014-07-26 00:38:44 +02:00 |
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Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
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Clifford Wolf
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5826670009
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Various RTLIL::SigSpec related code cleanups
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2014-07-25 14:25:42 +02:00 |
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Clifford Wolf
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0520bfea89
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Fixed memory corruption in "opt_reduce" pass
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2014-07-25 12:49:51 +02:00 |
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Clifford Wolf
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c4e4f79a2a
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Disabled cover() for non-linux builds
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2014-07-25 12:27:36 +02:00 |
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Clifford Wolf
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91bf0c90c8
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Improvements in "cover" command
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2014-07-25 12:04:40 +02:00 |
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Clifford Wolf
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6aa792c864
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Replaced more old SigChunk programming patterns
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2014-07-24 23:10:58 +02:00 |
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Clifford Wolf
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9962384d3e
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Added cover() calls to opt_const
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2014-07-24 20:47:18 +02:00 |
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Clifford Wolf
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45b4154b37
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Added "make SMALL=1"
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2014-07-24 19:03:57 +02:00 |
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Clifford Wolf
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b17d6531c8
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Added "make PRETTY=1"
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2014-07-24 17:15:01 +02:00 |
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Clifford Wolf
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2f54345cff
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Added "cover" command
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2014-07-24 16:14:19 +02:00 |
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Clifford Wolf
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20a7965f61
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Various small fixes (from gcc compiler warnings)
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2014-07-23 20:45:27 +02:00 |
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Clifford Wolf
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c094c53de8
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Removed RTLIL::SigSpec::optimize()
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2014-07-23 20:32:28 +02:00 |
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Clifford Wolf
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a62c21c9c6
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Removed RTLIL::SigSpec::expand() method
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2014-07-23 19:34:51 +02:00 |
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Clifford Wolf
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4e802eb7f6
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Fixed all users of SigSpec::chunks_rw() and removed it
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2014-07-23 15:36:09 +02:00 |
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Clifford Wolf
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ec923652e2
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
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2014-07-23 09:52:55 +02:00 |
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Clifford Wolf
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a8d3a68971
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
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2014-07-23 09:49:43 +02:00 |
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Clifford Wolf
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260c19ec5a
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3
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2014-07-23 09:34:47 +02:00 |
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Clifford Wolf
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4a6d234ec7
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SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands
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2014-07-22 23:11:36 +02:00 |
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Clifford Wolf
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65a939cb27
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Fixed memory corruption with new SigSpec API in proc_mux
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2014-07-22 22:54:39 +02:00 |
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Clifford Wolf
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e7e30f1c86
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fixed memory leak in fsm_opt
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2014-07-22 22:52:57 +02:00 |
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Clifford Wolf
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28b3fd05fa
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SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()
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2014-07-22 20:58:44 +02:00 |
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Clifford Wolf
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4b4048bc5f
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SigSpec refactoring: using the accessor functions everywhere
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2014-07-22 20:39:37 +02:00 |
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Clifford Wolf
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a233762a81
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SigSpec refactoring: renamed chunks and width to __chunks and __width
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2014-07-22 20:39:37 +02:00 |
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Clifford Wolf
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137dbf3cf7
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Added "opt_const -keepdc"
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2014-07-21 21:38:55 +02:00 |
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Clifford Wolf
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1873480ca5
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Added mul to mux conversion to "opt_const -fine"
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2014-07-21 17:19:50 +02:00 |
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Clifford Wolf
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1241a9fd50
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Added "opt_const -fine" and "opt_reduce -fine"
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2014-07-21 16:34:16 +02:00 |
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Clifford Wolf
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e035f1d886
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Added opt_const support for simple identities
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2014-07-21 14:41:02 +02:00 |
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Clifford Wolf
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361e0d62ff
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Replaced depricated NEW_WIRE macro with module->addWire() calls
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2014-07-21 12:42:02 +02:00 |
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Clifford Wolf
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1d88f1cf9f
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Removed deprecated module->new_wire()
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2014-07-21 12:35:06 +02:00 |
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Clifford Wolf
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3cb61d03f8
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Wider range of cell types supported in "share" pass
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2014-07-21 12:18:29 +02:00 |
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Clifford Wolf
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b49beab1f3
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Use ezSAT::non_incremental() in "share" pass
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2014-07-21 02:08:38 +02:00 |
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Clifford Wolf
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04fcb07213
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Added support for resource sharing in mux control logic
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2014-07-20 20:44:14 +02:00 |
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Clifford Wolf
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1ce5e83555
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Added "select -assert-count"
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2014-07-20 20:15:49 +02:00 |
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Clifford Wolf
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e9506bb2da
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Supercell creation for $div/$mod worked all along, fixed test benches
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2014-07-20 18:54:06 +02:00 |
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Clifford Wolf
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ff28029fdb
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Fixed creation of shift supercells in "share" pass
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2014-07-20 17:06:36 +02:00 |
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Clifford Wolf
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4c38ec1cc8
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Added "miter -equiv -flatten"
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2014-07-20 15:33:07 +02:00 |
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Clifford Wolf
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8d04ca7d22
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Added call_on_selection() and call_on_module() API
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2014-07-20 15:33:06 +02:00 |
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Clifford Wolf
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5b3ee7a072
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Added "share" supercell creation
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2014-07-20 15:01:17 +02:00 |
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Clifford Wolf
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7b98e46ac3
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Added removing of always inactive cells to "share" pass
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2014-07-20 13:24:36 +02:00 |
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