Commit graph

7 commits

Author SHA1 Message Date
Clifford Wolf
1cb25c05b3 Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00
Clifford Wolf
482d9208aa Added read_verilog -sv options, added support for bit, logic,
allways_ff, always_comb, and always_latch
2014-06-12 11:54:20 +02:00
Clifford Wolf
02e6f2c5be Added Verilog support for "`default_nettype none" 2014-02-17 14:28:52 +01:00
Clifford Wolf
e4429c480e Enable {* .. *} feature per default (removes dependency to REJECT feature in flex) 2013-11-22 12:46:02 +01:00
Johann Glaser
a99c224157 Added support for include directories with the new '-I' argument of the
'read_verilog' command
2013-08-20 15:48:16 +02:00
Johann Glaser
10a195c0a1 added option '-Dname[=definition]' to command 'read_verilog' 2013-05-19 17:07:52 +02:00
Clifford Wolf
7764d0ba1d initial import 2013-01-05 11:13:26 +01:00