stv0g/yosys
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271 commits 1 branch 6 tags 8.6 MiB
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4 commits

Author SHA1 Message Date
Clifford Wolf
21d9251e52 Added "dump" command (part ilang backend) 2013-06-02 17:53:30 +02:00
Clifford Wolf
88af5b6a16 Improved opt_share for reduce cells 2013-03-29 11:19:21 +01:00
Clifford Wolf
041c06bd9d Create nice errors when calling RTLIL::Module::derive() of base class 2013-03-26 19:27:49 +01:00
Clifford Wolf
7764d0ba1d initial import 2013-01-05 11:13:26 +01:00