Clifford Wolf
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669a6e462d
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Added checking for ABC modifications to Makefile and made sure we do not have the word ERROR in regular make output
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2014-02-08 12:27:38 +01:00 |
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Clifford Wolf
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2c51619c2b
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Now also move net labes to the right position in splice cmd
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2014-02-08 00:06:00 +01:00 |
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Clifford Wolf
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274bcef66c
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Improved detection of primary wire for a signal in opt_clean
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2014-02-07 23:50:17 +01:00 |
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Clifford Wolf
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244e8ce1f4
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Added splice command
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2014-02-07 20:30:56 +01:00 |
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Clifford Wolf
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08aa1062b4
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Added log_header() to splitnets
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2014-02-07 19:51:15 +01:00 |
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Clifford Wolf
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d85a6bf5d3
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Added $slice and $concat to CellTypes list
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2014-02-07 19:50:44 +01:00 |
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Clifford Wolf
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fc3b3c4ec3
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Added $slice and $concat cell types
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2014-02-07 17:44:57 +01:00 |
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Clifford Wolf
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a1ac710ab8
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Stronger checking of internal cells
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2014-02-07 17:39:35 +01:00 |
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Clifford Wolf
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99b1e9ee56
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Re-enabled abc "retime" after sorting yout the yosys-bigsim problem
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2014-02-07 16:36:37 +01:00 |
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Clifford Wolf
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a51a3fa2d2
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Added echo command
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2014-02-07 14:17:00 +01:00 |
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Clifford Wolf
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366dcd3abf
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Fixed use of "cmd_error" in passes/cmds/design.cc
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2014-02-07 14:16:42 +01:00 |
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Clifford Wolf
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f4f230d7cc
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Fixed gcc compiler warnings with release build
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2014-02-06 22:49:14 +01:00 |
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Clifford Wolf
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0192f1c66e
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Disabled ABC retime for now (elliptic_curve_group testcase in yosys-bigsim failed)
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2014-02-06 22:31:58 +01:00 |
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Clifford Wolf
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a170d114a5
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Updated ABC to rev 10cc13a2a0f1
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2014-02-06 22:18:17 +01:00 |
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Clifford Wolf
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58cb8d65af
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Added "retime" to standard ABC recipes
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2014-02-06 22:16:20 +01:00 |
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Clifford Wolf
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91eab69912
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Added copy command
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2014-02-06 22:09:21 +01:00 |
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Clifford Wolf
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cf593222f2
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Added design -stash/-copy-from/-copy-to
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2014-02-06 21:52:07 +01:00 |
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Clifford Wolf
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37fdb2ca7a
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Added support for s: select expressions (wire width)
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2014-02-06 19:45:03 +01:00 |
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Clifford Wolf
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9428050dd6
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Added i:, o:, and x: selection pattern
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2014-02-06 19:35:33 +01:00 |
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Clifford Wolf
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d7d1c7baf8
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Added support for %m selection op
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2014-02-06 19:30:08 +01:00 |
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Clifford Wolf
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f2fdcef13d
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Merge branch 'master' of github.com:cliffordwolf/yosys
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2014-02-06 19:22:50 +01:00 |
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Clifford Wolf
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fa295a4528
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Added generic RTLIL::SigSpec::parse_sel() with support for selection variables
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2014-02-06 19:22:46 +01:00 |
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Clifford Wolf
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9c24b41f55
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Merge pull request #23 from hansiglaser/master
new %s: add sub-modules to selection
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2014-02-06 18:08:02 +01:00 |
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Johann Glaser
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34eb77d2bf
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new %s: add sub-modules to selection
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2014-02-06 17:36:39 +01:00 |
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Clifford Wolf
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d4b0f28881
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Added support for sat -show @<sel_name>
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2014-02-06 17:32:51 +01:00 |
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Clifford Wolf
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b1a12c5f37
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Added sat -set-init-def and sat -tempinduct-def
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2014-02-06 16:15:23 +01:00 |
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Clifford Wolf
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594d52e0b6
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Added opt_const -undriven
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2014-02-06 15:49:03 +01:00 |
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Clifford Wolf
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c526e56747
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Added expose -dff
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2014-02-06 15:48:42 +01:00 |
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Clifford Wolf
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1c6dea3a0d
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Added support for #-comments in same line as command
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2014-02-06 14:26:39 +01:00 |
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Clifford Wolf
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821156b6cf
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presentation progress
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2014-02-06 14:01:43 +01:00 |
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Clifford Wolf
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c13c5b9b7b
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Changed techmap description from "simple" to "generic"
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2014-02-06 13:10:06 +01:00 |
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Clifford Wolf
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eb8fd4a163
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Added miter -make_outcmp
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2014-02-06 02:20:55 +01:00 |
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Clifford Wolf
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80a1cdb0e2
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Added sat -set-init-zero support
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2014-02-06 01:40:01 +01:00 |
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Clifford Wolf
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19029f377b
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Added support for backslash continuation in script files
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2014-02-06 01:28:33 +01:00 |
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Clifford Wolf
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849fd62cfe
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Added counters sat test case
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2014-02-06 01:00:56 +01:00 |
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Clifford Wolf
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e915043144
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Added sat -verify and -falsify support for non-prove cases
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2014-02-06 00:59:41 +01:00 |
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Clifford Wolf
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cd06055e77
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Added expose command
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2014-02-05 23:59:55 +01:00 |
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Clifford Wolf
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7e9ba60df8
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presentation progress
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2014-02-05 20:06:34 +01:00 |
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Clifford Wolf
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dbfcc2f4e2
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Simplified select "Assertation failed" message generation
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2014-02-05 18:52:55 +01:00 |
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Clifford Wolf
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94b802c65d
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Merge branch 'master' of github.com:cliffordwolf/yosys
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2014-02-05 18:46:47 +01:00 |
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Clifford Wolf
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7ea97a0471
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Merge pull request #22 from hansiglaser/master
Little improvements for "select"
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2014-02-05 18:46:36 +01:00 |
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Clifford Wolf
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583636f0ad
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Added BTOR backend README file
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2014-02-05 18:31:10 +01:00 |
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Clifford Wolf
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f6e6e9b844
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Added selection support for r: and selection with relational operators
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2014-02-05 18:24:45 +01:00 |
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Johann Glaser
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3c0b5139a1
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be more verbose for select -assert-any and -assert-none
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2014-02-05 16:03:02 +01:00 |
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Johann Glaser
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667543de0b
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improved help for "select"
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2014-02-05 15:53:02 +01:00 |
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Clifford Wolf
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3b5c462273
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presentation progress
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2014-02-05 15:06:13 +01:00 |
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Clifford Wolf
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9f6364c1c4
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presentation progress
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2014-02-05 13:12:50 +01:00 |
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Clifford Wolf
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aa8e754ae5
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Added read_verilog -setattr
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2014-02-05 11:22:10 +01:00 |
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Clifford Wolf
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5bf33de24a
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Added setattr and setparam commands
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2014-02-05 11:11:55 +01:00 |
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Clifford Wolf
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078cecf9ea
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Updated todo items in README file
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2014-02-05 01:59:30 +01:00 |
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