Clifford Wolf
|
7354a1718e
|
Fixed SAT and ConstEval undef handling for $pmux and $safe_pmux
|
2014-01-03 17:30:50 +01:00 |
|
Clifford Wolf
|
eec2cd1e78
|
Added RTLIL::SigSpec::optimized() API
|
2014-01-03 02:43:31 +01:00 |
|
Clifford Wolf
|
fb2bf934dc
|
Added correct handling of $memwr priority
|
2014-01-03 00:22:17 +01:00 |
|
Clifford Wolf
|
1f80557ade
|
Added SAT undef model for $pmux and $safe_pmux
|
2014-01-02 19:58:59 +01:00 |
|
Clifford Wolf
|
249ef8695a
|
Major rewrite of "freduce" command
|
2014-01-02 16:52:33 +01:00 |
|
Clifford Wolf
|
15acf593e7
|
Added additional checks for A_SIGNED == B_SIGNED for cells with that constraint
|
2013-12-31 14:54:06 +01:00 |
|
Clifford Wolf
|
bf607df6d5
|
Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)
|
2013-12-29 17:39:49 +01:00 |
|
Clifford Wolf
|
c69c416d28
|
Added $bu0 cell (for easy correct $eq/$ne mapping)
|
2013-12-28 12:02:14 +01:00 |
|
Clifford Wolf
|
122b3c067b
|
Fixed sat handling of $eqx and $nex with unequal port widths
|
2013-12-27 18:11:05 +01:00 |
|
Clifford Wolf
|
0f5ab7649e
|
Small cleanup in SatGen
|
2013-12-27 15:18:14 +01:00 |
|
Clifford Wolf
|
ebf9abfeb6
|
Fixed sat handling of $eqx and $nex cells
|
2013-12-27 14:32:42 +01:00 |
|
Clifford Wolf
|
369bf81a70
|
Added support for non-const === and !== (for miter circuits)
|
2013-12-27 14:20:15 +01:00 |
|
Clifford Wolf
|
ecc30255ba
|
Added proper === and !== support in constant expressions
|
2013-12-27 13:50:08 +01:00 |
|
Clifford Wolf
|
2ee3ac4ba3
|
Added log_dump() API
|
2013-12-20 12:11:58 +01:00 |
|
Clifford Wolf
|
8a815ac741
|
Added "sat" undef support and "sat -set-init" options
|
2013-12-07 17:28:51 +01:00 |
|
Clifford Wolf
|
ccf083e5b0
|
Fixed uninitialized const flags bug
|
2013-12-07 16:56:34 +01:00 |
|
Clifford Wolf
|
5d83904746
|
Fixes and improvements in RTLIL::SigSpec::parse
|
2013-12-07 11:57:29 +01:00 |
|
Clifford Wolf
|
f4b46ed31e
|
Replaced signed_parameters API with CONST_FLAG_SIGNED
|
2013-12-04 14:24:44 +01:00 |
|
Clifford Wolf
|
93a70959f3
|
Replaced RTLIL::Const::str with generic decoder method
|
2013-12-04 14:14:05 +01:00 |
|
Clifford Wolf
|
a66ca0472a
|
Added Pass:call_newsel API
|
2013-12-02 12:17:04 +01:00 |
|
Clifford Wolf
|
905eac04f1
|
Added "history" command
|
2013-12-02 11:29:39 +01:00 |
|
Clifford Wolf
|
1b3a60976d
|
Using RTLIL::id2cstr for prompt printing
|
2013-11-29 11:55:18 +01:00 |
|
Clifford Wolf
|
61412d167f
|
Improvements in satgen undef handling
|
2013-11-25 16:50:45 +01:00 |
|
Clifford Wolf
|
bd65e67d8a
|
Improvements in satgen undef handling
|
2013-11-25 15:12:01 +01:00 |
|
Clifford Wolf
|
8c3f4b3957
|
Started implementing undef handling in satgen
|
2013-11-25 04:51:33 +01:00 |
|
Clifford Wolf
|
8dafecd34d
|
Added module->avail_parameters (for advanced techmap features)
|
2013-11-24 20:29:07 +01:00 |
|
Clifford Wolf
|
f71e27dbf1
|
Remove auto_wire framework (smarter than the verilog standard)
|
2013-11-24 17:29:11 +01:00 |
|
Clifford Wolf
|
609caa23b5
|
Implemented correct handling of signed module parameters
|
2013-11-24 17:17:21 +01:00 |
|
Clifford Wolf
|
532091afcb
|
Added more generic _TECHMAP_ wire mechanism to techmap pass
|
2013-11-23 15:58:06 +01:00 |
|
Clifford Wolf
|
c854ad2e7e
|
Some driver changes/fixes
|
2013-11-22 14:53:57 +01:00 |
|
Clifford Wolf
|
058ceda6a0
|
Added more performance measurement infrastructure
|
2013-11-22 14:08:10 +01:00 |
|
Clifford Wolf
|
18d003254c
|
Massive performance improvement from refactoring RTLIL::SigSpec::optimize()
|
2013-11-22 04:41:20 +01:00 |
|
Clifford Wolf
|
8e58bb330d
|
Added SigBit struct and refactored RTLIL::SigSpec::extract
|
2013-11-22 04:07:13 +01:00 |
|
Clifford Wolf
|
09471846c5
|
Major improvements in mem2reg and added "init" sync rules
|
2013-11-21 13:49:00 +01:00 |
|
Clifford Wolf
|
7d52eb0ddb
|
Added -v<level> option and some minor driver cleanups
|
2013-11-17 13:26:31 +01:00 |
|
Clifford Wolf
|
0fd3ebdb23
|
Added information on all internal cell types to internal checker
|
2013-11-11 00:13:18 +01:00 |
|
Clifford Wolf
|
378cc509cd
|
Call internal checker more often
|
2013-11-10 23:24:21 +01:00 |
|
Clifford Wolf
|
223892ac28
|
Improved user-friendliness of "sat" and "eval" expression parsing
|
2013-11-09 12:02:27 +01:00 |
|
Clifford Wolf
|
18f9477e95
|
Added verification of SAT model to "eval -vloghammer_report" command
|
2013-11-09 11:38:17 +01:00 |
|
Clifford Wolf
|
259cc1391e
|
More undef-propagation related fixes
|
2013-11-08 11:40:36 +01:00 |
|
Clifford Wolf
|
81b8f3292e
|
Removed debug log from const_pow()
|
2013-11-08 04:43:38 +01:00 |
|
Clifford Wolf
|
fc6dc0d7b8
|
Fixed handling of power operator
|
2013-11-07 22:20:00 +01:00 |
|
Clifford Wolf
|
d7cb62ac96
|
Fixed more extend vs. extend_u0 issues
|
2013-11-07 19:20:20 +01:00 |
|
Clifford Wolf
|
947bd9b96b
|
Renamed extend_un0() to extend_u0() and use it in genrtlil
|
2013-11-07 18:17:10 +01:00 |
|
Clifford Wolf
|
0e1661f84e
|
Fixed type of sign extension in opt_const $eq/$ne handling
|
2013-11-07 16:53:28 +01:00 |
|
Clifford Wolf
|
8c523ef81d
|
Improved undef handling in == and != for ConstEval
|
2013-11-06 22:25:35 +01:00 |
|
Clifford Wolf
|
6fcbc79b5c
|
Improved width extension with regard to undef propagation
|
2013-11-06 21:05:11 +01:00 |
|
Clifford Wolf
|
f839b842a2
|
Fixed handling of undef values in POS cells in ConstEval
|
2013-11-06 18:45:31 +01:00 |
|
Clifford Wolf
|
204572d926
|
Fixed handling of undef values in MUX select input in ConstEval
|
2013-11-06 17:33:20 +01:00 |
|
Clifford Wolf
|
f94266bb42
|
Added eval -vloghammer_report mode
|
2013-11-06 04:14:56 +01:00 |
|