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  • e7bec9bbb8 Updated ABC Clifford Wolf 2016-02-07 08:56:32 +01:00
  • 825b99efc1 Added "stat -liberty" for calculating chip area Clifford Wolf 2016-02-04 12:26:13 +01:00
  • 6a27cbe5b1 Bugfix in Verific front-end Clifford Wolf 2016-02-03 08:59:57 +01:00
  • 4a3e1ded1e Updated verific build instructions Clifford Wolf 2016-02-02 19:50:17 +01:00
  • 801c022457 Improved dffsr2dff pass Clifford Wolf 2016-02-02 19:42:49 +01:00
  • d69395ca08 Added dffsr2dff Clifford Wolf 2016-02-02 17:19:01 +01:00
  • ba407da187 Added addBufGate module method Clifford Wolf 2016-02-02 11:26:07 +01:00
  • d6592d5b99 Use alphanumerical order instead of idstring idx in opt_clean compare_signals() Clifford Wolf 2016-02-02 09:16:18 +01:00
  • 74657f88a1 Added CodeOfConduct Clifford Wolf 2016-02-01 16:36:59 +01:00
  • 7ef613ebdf Updated ABC to hg rev ee212a9e94df Clifford Wolf 2016-02-01 15:51:27 +01:00
  • bd10927f45 Progress in cell library documentation Clifford Wolf 2016-02-01 13:58:10 +01:00
  • 17372d8abd Added "abc -luts" option, Improved Xilinx logic mapping Clifford Wolf 2016-02-01 12:40:32 +01:00
  • 9251553592 Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs) Clifford Wolf 2016-02-01 11:49:11 +01:00
  • 01bcc5663f SigMap performance improvement Clifford Wolf 2016-02-01 10:10:20 +01:00
  • ea492abcf0 hashlib mfp<> performance improvements Clifford Wolf 2016-02-01 10:03:03 +01:00
  • 13e15a24a2 Added reserve() method to haslib classes and calculate hashtable size based on entries capacity, not size Clifford Wolf 2016-01-31 22:50:34 +01:00
  • 173fc4f420 Merge branch 'rtlil_remove2_speedup' of https://github.com/kc8apf/yosys Clifford Wolf 2016-01-31 21:53:18 +01:00
  • 71f418c468 More clang sanitizer stuff Clifford Wolf 2016-01-31 19:55:48 +01:00
  • 3c48de8e21 rtlil: Improve performance of SigSpec::extract(SigSpec, SigSpec*) Rick Altherr 2016-01-31 09:07:21 -08:00
  • 0265d7b100 rtlil: speed up SigSpec::sort_and_unify() Rick Altherr 2016-01-31 08:55:49 -08:00
  • 89dc40f162 rtlil: improve performance of SigSpec::replace(SigSpec, SigSpec, SigSpec*) Rick Altherr 2016-01-30 19:43:29 -08:00
  • 34969d4140 genrtlil: avoid converting SigSpec to set<SigBit> when going through removeSignalFromCaseTree() Rick Altherr 2016-01-30 19:26:46 -08:00
  • cd3e1095b0 rtlil: improve performance of SigSpec::remove2(SigSpec, SigSpec*) Rick Altherr 2016-01-30 19:25:35 -08:00
  • 5462399c88 Meaningless coding style change Clifford Wolf 2016-01-31 16:12:35 +01:00
  • aed8fb353c Merge branch 'rtlil_remove2_speedup' of https://github.com/kc8apf/yosys Clifford Wolf 2016-01-31 16:10:27 +01:00
  • fe97110be0 Addedd clang sanitizers Clifford Wolf 2016-01-31 16:08:21 +01:00
  • 43756559d8 rtlil: rewrite remove2() to avoid copying Rick Altherr 2016-01-29 22:40:45 -08:00
  • 12ebdef17c rtlil: duplicate remove2() for std::set<> Rick Altherr 2016-01-29 22:03:12 -08:00
  • 9e26147ccd rtlil: change IdString comparison operators to take references instead of copies Rick Altherr 2016-01-29 22:40:17 -08:00
  • 8b3f8cd220 Added "equiv_struct -fwonly" Clifford Wolf 2016-01-08 10:59:16 +01:00
  • f5008f4f8a Bugfixes in equiv_struct Clifford Wolf 2016-01-08 09:39:27 +01:00
  • d00c63c927 Added "submod -copy" Clifford Wolf 2016-01-08 09:08:12 +01:00
  • 4393a8ffbf Added "write_blif -cname" mode Clifford Wolf 2016-01-06 14:32:28 +01:00
  • c3fd03d722 Added "equiv_struct -maxiter <N>" Clifford Wolf 2016-01-06 13:54:54 +01:00
  • 1f8c47fb47 Added "equiv_add -try" mode Clifford Wolf 2016-01-06 13:54:00 +01:00
  • 1d62f8710f Fixed "splitnets -ports" for hierarchical designs Clifford Wolf 2015-12-22 13:25:00 +01:00
  • 2ee608246f Re-run ice40_opt in "synth_ice40 -abc2" Clifford Wolf 2015-12-22 12:19:11 +01:00
  • 3102ffbb83 Improvements in ice40_opt Clifford Wolf 2015-12-22 12:18:38 +01:00
  • 8bf452c364 Bugfix in ice40_ffinit Clifford Wolf 2015-12-22 12:18:06 +01:00
  • ec93d258a4 Improved ice40_ffinit Clifford Wolf 2015-12-22 11:15:25 +01:00
  • f1b959dc69 Run opt_const before check in default scripts Clifford Wolf 2015-12-22 11:15:05 +01:00
  • ab0c44d3ed Added %R select expression Clifford Wolf 2015-12-20 13:35:58 +01:00
  • 5e90a78466 Various improvements in BLIF front-end Clifford Wolf 2015-12-20 13:12:24 +01:00
  • 47fac573cf Added yosys-smtbmc -S Clifford Wolf 2015-12-20 09:58:54 +01:00
  • 9df59f0c2c Merge pull request #110 from scanlime/master Clifford Wolf 2015-12-15 19:54:07 +01:00
  • 7948156abf Mac build fix, gsed -> sed Micah Elizabeth Scott 2015-12-15 10:22:35 -08:00
  • 93f6f68b65 Remove nonportable "-r" option from xargs Micah Elizabeth Scott 2015-12-15 10:13:06 -08:00
  • 494e5f24f9 Added "synth_ice40 -abc2" Clifford Wolf 2015-12-08 11:16:26 +01:00
  • 4d0a6dac7b Merge pull request #108 from cseed/master Clifford Wolf 2015-12-07 03:32:20 +01:00
  • 9f5b6e4cbc Added LO to ICESTORM_LC for LUT cascade route. Cotton Seed 2015-12-06 17:24:48 -05:00
  • 1ea6db3db8 Improved proc_mux performance for huge always blocks Clifford Wolf 2015-12-02 22:02:20 +01:00
  • 33a5b28e25 Added default values for hashlib at() methods Clifford Wolf 2015-12-02 20:41:57 +01:00
  • 276101f032 Re-added SigMap::allbits() Clifford Wolf 2015-11-30 19:43:52 +01:00
  • 0f94902125 Added tests/simple/graphtest.v Clifford Wolf 2015-11-30 11:41:12 +01:00
  • 4a697accd4 Fixed oom bug in ilang parser Clifford Wolf 2015-11-29 20:30:32 +01:00
  • 32f5ee117c Fixed performance bug in ilang parser Clifford Wolf 2015-11-27 19:46:47 +01:00
  • a7ffb85690 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2015-11-26 18:24:23 +01:00
  • 6459e3ac39 Removed dangling ';' in rtlil.h Clifford Wolf 2015-11-26 18:11:34 +01:00
  • 0793f1b196 Added ice40_ffinit pass Clifford Wolf 2015-11-26 18:11:06 +01:00
  • ab2d8e5c8c Added PRIM_DLATCHRS support to verific front-end Clifford Wolf 2015-11-24 12:16:19 +01:00
  • 8ff229a3ea Fixed WE/RE usage in iCE40 BRAM mapping Clifford Wolf 2015-11-24 10:51:34 +01:00
  • c86fbae3d1 Fixed handling of re-declarations of wires in tasks and functions Clifford Wolf 2015-11-23 17:09:57 +01:00
  • e61c7f887a Added torder command Clifford Wolf 2015-11-19 15:34:32 +01:00
  • 415e0a1b90 Fixed performance bug in Verific importer Clifford Wolf 2015-11-16 12:38:56 +01:00
  • b18f3a2974 Changes for Verific 3.16_484_32_151112 Clifford Wolf 2015-11-12 19:28:14 +01:00
  • fd3e10c295 Link to vlsitechnology.org for liberty files Clifford Wolf 2015-11-12 13:15:19 +01:00
  • 7ae3d1b5a9 More bugfixes in handling of parameters in tasks and functions Clifford Wolf 2015-11-12 13:02:36 +01:00
  • 34f2b84fb6 Fixed handling of parameters and localparams in functions Clifford Wolf 2015-11-11 10:54:35 +01:00
  • d98d99aec6 Added "abc -g" Clifford Wolf 2015-11-10 11:10:11 +01:00
  • faa3da5a1b Merge pull request #97 from zeldin/master Clifford Wolf 2015-11-08 22:16:49 +01:00
  • 8c2bdef36d Fix a segfault in dffinit when the value has too few bits Marcus Comstedt 2015-11-08 19:16:56 +01:00
  • 1ec6429bad Added "singleton" pass Clifford Wolf 2015-11-07 19:10:43 +01:00
  • 3ad742056b Fixed iCE40 SB_IO OUTPUT_ENABLE vs. outena_q handling Clifford Wolf 2015-11-06 17:02:16 +01:00
  • f401eeb0cf Bugfix in mapping $tribuf to $_TBUF_ Clifford Wolf 2015-11-05 12:37:43 +01:00
  • ddf3e2dc65 Bugfix in memory_dff Clifford Wolf 2015-10-31 22:01:41 +01:00
  • ccdbf41be6 Improvements in wreduce Clifford Wolf 2015-10-31 13:39:30 +01:00
  • 864808992b Bugfix in Xilinx LUT mapping Clifford Wolf 2015-10-30 13:58:03 +01:00
  • 1e32e4bdae Improved SigMap performance Clifford Wolf 2015-10-28 11:21:55 +01:00
  • e69efec588 Improvements in new SigMap Clifford Wolf 2015-10-28 00:39:53 +01:00
  • 0c202a2549 Use mfp<> in equiv_mark Clifford Wolf 2015-10-27 19:15:35 +01:00
  • f3db70d2f3 Removed old SigMap implementation Clifford Wolf 2015-10-27 15:09:44 +01:00
  • 09b4050f2e Added hashlib::mfp and new SigMap Clifford Wolf 2015-10-27 15:04:47 +01:00
  • 27714acd8a Improvements in equiv_struct Clifford Wolf 2015-10-25 22:04:20 +01:00
  • d014ba2d0e Major refactoring of equiv_struct Clifford Wolf 2015-10-25 19:31:29 +01:00
  • 207736b4ee Import more std:: stuff into Yosys namespace Clifford Wolf 2015-10-25 19:30:49 +01:00
  • da923c198e Added "equiv_add -cell" Clifford Wolf 2015-10-25 14:35:40 +01:00
  • 83bd27bf6e equiv_struct now creates equiv_merged attributes Clifford Wolf 2015-10-25 02:15:20 +02:00
  • 453736d918 Improvements in equiv_struct Clifford Wolf 2015-10-24 23:04:17 +02:00
  • 7f110e7018 renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit() Clifford Wolf 2015-10-24 22:56:40 +02:00
  • 6af8076967 improvement in "stat" Clifford Wolf 2015-10-24 21:56:53 +02:00
  • a1c3df7fe4 Fixed driver conflict handling (various cmds) Clifford Wolf 2015-10-24 19:23:30 +02:00
  • 6fe48cf41e equiv_purge bugfix, using SigChunk in Yosys namespace Clifford Wolf 2015-10-24 19:09:45 +02:00
  • 2a0f577f83 Fixed handling of driver-driver conflicts in wreduce Clifford Wolf 2015-10-24 13:44:35 +02:00
  • 4cec1c058d Added equiv_mark command Clifford Wolf 2015-10-23 23:56:58 +02:00
  • c35db8c19e Disabled "Skipping blackbox module" msg in show command Clifford Wolf 2015-10-23 20:11:05 +02:00
  • 281a033e92 Added support for ":" as comment symbol after ;-parsing Clifford Wolf 2015-10-23 20:08:33 +02:00
  • 15a67392f1 Also merge $equiv cells in equiv_struct Clifford Wolf 2015-10-23 15:26:58 +02:00
  • d19069b0fb Improvements in equiv_struct Clifford Wolf 2015-10-23 15:11:57 +02:00
  • 84a07ffb8a Added equiv_purge Clifford Wolf 2015-10-22 15:40:27 +02:00
  • 00e05b1310 Added equiv_struct command Clifford Wolf 2015-10-21 17:12:35 +02:00