14 lines
259 B
Verilog
14 lines
259 B
Verilog
// There must be white space after the
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// string which uses escape character
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module \1dff (
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q, // Q output
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\q~ , // Q_out output
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d, // D input
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cl$k, // CLOCK input
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\reset* // Reset input
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);
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input d, cl$k, \reset* ;
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output q, \q~ ;
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endmodule
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