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yosys
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techlibs
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common
History
Clifford Wolf
b3b00f1bf4
Various small cleanups in stdcells.v techmap code
2013-12-31 15:41:40 +01:00
..
blackbox.sed
Renamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 20:44:00 +01:00
Makefile.inc
Renamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 20:44:00 +01:00
simcells.v
Renamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 20:44:00 +01:00
simlib.v
Added support for non-const === and !== (for miter circuits)
2013-12-27 14:20:15 +01:00
stdcells.v
Various small cleanups in stdcells.v techmap code
2013-12-31 15:41:40 +01:00