Clifford Wolf 7aa2d746b7 Merged addition of SED makefile variable from github.com/Siesh1oo/yosys ... (see https://github.com/cliffordwolf/yosys/pull/28)		2014-03-11 14:42:58 +01:00
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blackbox.sed	Renamed stdcells_sim.v to simcells.v and fixed blackbox.v	2013-11-24 20:44:00 +01:00
Makefile.inc	Merged addition of SED makefile variable from github.com/Siesh1oo/yosys	2014-03-11 14:42:58 +01:00
pmux2mux.v	Added techlibs/common/pmux2mux.v	2014-01-17 20:06:15 +01:00
simcells.v	Renamed stdcells_sim.v to simcells.v and fixed blackbox.v	2013-11-24 20:44:00 +01:00
simlib.v	Added $slice and $concat cell types	2014-02-07 17:44:57 +01:00
stdcells.v	Fixes for improved techmap of shifts with large B inputs	2014-03-06 13:33:12 +01:00