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126da0ad3d
yosys
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techlibs
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greenpak4
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Andrew Zonenberg
2096a05ec2
Changed order of passes for better handling of INIT attributes on "output reg" FFs
2016-05-04 17:13:54 -07:00
..
cells_map.v
Added tri-state I/O extraction for GreenPak
2016-05-03 22:53:29 -07:00
cells_sim.v
Renamed module parameter
2016-05-04 17:03:45 -07:00
gp_dff.lib
Fixed indenting in techlibs/greenpak4/gp_dff.lib
2016-03-29 13:44:14 +02:00
greenpak4_counters.cc
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
Makefile.inc
Refactored synth_greenpak4 to use iopadmap for mapping GP_IOBUF/GP_OBUFT cells instead of extract
2016-05-04 15:55:16 -07:00
synth_greenpak4.cc
Changed order of passes for better handling of INIT attributes on "output reg" FFs
2016-05-04 17:13:54 -07:00