yosys/tests
2014-07-16 10:03:07 +02:00
..
asicworld Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
hana Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
realmath Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
sat now ignore init attributes on non-register wires in sat command 2014-07-05 11:18:38 +02:00
simple Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00
techmap Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh 2014-03-11 11:59:58 +01:00
tools Added note to "make test": use git checkout of iverilog 2014-07-16 10:03:07 +02:00