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a8fe040906
yosys
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tests
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bram
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luke whittlesey
a8fe040906
Bug fix in $mem verilog backend + changed tests/bram flow of make test.
2015-06-04 16:12:40 -04:00
..
.gitignore
Bram testbench (incomplete)
2015-01-01 17:01:17 +01:00
generate.py
changed file() to open() in python scripts
2015-05-11 21:58:21 +02:00
run-single.sh
Bug fix in $mem verilog backend + changed tests/bram flow of make test.
2015-06-04 16:12:40 -04:00
run-test.sh
Progress in memory_bram
2015-01-03 10:57:01 +01:00