141 lines
No EOL
6.6 KiB
XML
141 lines
No EOL
6.6 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?><!--
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################################################################################
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#
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# MYiR Z-turn Board Definition File
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#
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# Sergiusz 'q3k' Bazański <q3k@q3k.org>
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# Steffen 'stv0g' Vogel <stv0g@0l.de>
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#
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################################################################################-->
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<board name="mys-7z020" schema_version="2.1" vendor="myir.com" display_name="Z-turn Board (MYS-7Z020-C)" url="http://www.myirtech.com/list.asp?id=502" preset_file="preset.xml">
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<images>
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<image name="zturn_board.jpg" display_name="Z-turn Board" sub_type="board">
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<description>Z-turn Board top image</description>
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</image>
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</images>
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<description>The Z-turn board is a cheap Zynq evaluation board from the Chinese company MYiR Technologies.</description>
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<file_version>2.1</file_version>
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<compatible_board_revisions>
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<revision id="0">4</revision>
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</compatible_board_revisions>
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<components>
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<component name="part0" display_name="Z-turn Board" type="fpga" part_name="xc7z020clg400-1" pin_map_file="part0_pins.xml" vendor="xilinx" spec_url="http://www.myirtech.com/list.asp?id=502">
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<description>FPGA part on the board</description>
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<interfaces>
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<interface name="ps7_fixedio" mode="master" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0" of_component="ps7_fixedio" preset_proc="ps7_preset" />
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<interface name="rgb_led" mode="master" type="xilinx.com:interface:gpio_rtl:1.0" of_component="rgb_led" preset_proc="rgb_led_preset">
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<preferred_ips>
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<preferred_ip name="axi_gpio" vendor="xilinx.com" library="ip" order="0" />
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</preferred_ips>
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<port_maps>
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<port_map logical_port="TRI_O" physical_port="rgb_led_tri_o" dir="out" left="2" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="rgb_led_tri_o_0" />
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<pin_map port_index="1" component_pin="rgb_led_tri_o_1" />
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<pin_map port_index="2" component_pin="rgb_led_tri_o_2" />
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface name="buzzer" mode="master" type="xilinx.com:interface:gpio_rtl:1.0" of_component="buzzer" preset_proc="buzzer_preset">
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<preferred_ips>
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<preferred_ip name="axi_gpio" vendor="xilinx.com" library="ip" order="0" />
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</preferred_ips>
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<port_maps>
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<port_map logical_port="TRI_O" physical_port="buzzer_tri_o" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="buzzer_tri_o_0" />
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface name="sws_4bits" mode="master" type="xilinx.com:interface:gpio_rtl:1.0" of_component="sws_4bits" preset_proc="sws_4bits_preset">
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<preferred_ips>
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<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0" />
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</preferred_ips>
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<port_maps>
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<port_map logical_port="TRI_I" physical_port="sws_4bits_tri_i" dir="in" left="3" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="sws_4bits_tri_i_0" />
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<pin_map port_index="1" component_pin="sws_4bits_tri_i_1" />
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<pin_map port_index="2" component_pin="sws_4bits_tri_i_2" />
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<pin_map port_index="3" component_pin="sws_4bits_tri_i_3" />
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="i2c0" type="xilinx.com:interface:iic_rtl:1.0" of_component="i2c0">
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<description>I2C Interface for onboard G-rate and temperature sensors</description>
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<preferred_ips>
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<preferred_ip vendor="xilinx.com" library="ip" name="axi_iic" order="0" />
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</preferred_ips>
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<port_maps>
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<port_map logical_port="SDA_I" physical_port="i2c0_sda_i" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_sda_i" />
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</pin_maps>
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</port_map>
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<port_map logical_port="SDA_O" physical_port="i2c0_sda_o" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_sda_i" />
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</pin_maps>
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</port_map>
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<port_map logical_port="SDA_T" physical_port="i2c0_sda_t" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_sda_i" />
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_I" physical_port="i2c0_scl_i" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_scl_i" />
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_O" physical_port="i2c0_scl_o" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_scl_i" />
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_T" physical_port="i2c0_scl_t" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="i2c0_scl_i" />
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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</interfaces>
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</component>
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<component name="ps7_fixedio" display_name="PS7 fixed IO" type="chip" sub_type="fixed_io" major_group="" />
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<component name="buzzer" display_name="Piezo Buzzer" type="chip" sub_type="led" major_group="General Purpose Input or Output">
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<description>Piezo Buzzer on Board (Schematic: M1)</description>
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</component>
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<component name="rgb_led" display_name="RGB LED" type="chip" sub_type="led" major_group="General Purpose Input or Output">
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<description>RGB LED, 2 to 0, Active Low (Schematic: D34)</description>
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</component>
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<component name="sws_4bits" display_name="DIP switches" type="chip" sub_type="switch" major_group="General Purpose Input or Output">
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<description>DIP Switches, 3 to 0 (Schematic: U20)</description>
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</component>
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<component name="i2c0" display_name="IIC" type="chip" sub_type="mux" major_group="Miscellaneous">
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<description>I2C Bus 0 wired to PL</description>
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</component>
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</components>
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<jtag_chains>
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<jtag_chain name="chain1">
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<position name="0" component="part0" />
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</jtag_chain>
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</jtag_chains>
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<connections>
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<connection name="part0_rgb_led" component1="part0" component2="rgb_led">
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<connection_map name="part0_rgb_led_1" c1_st_index="4" c1_end_index="6" c2_st_index="0" c2_end_index="2" />
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</connection>
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<connection name="part0_sws_4bits" component1="part0" component2="sws_4bits">
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<connection_map name="part0_sws_4bits_1" c1_st_index="0" c1_end_index="3" c2_st_index="0" c2_end_index="3" />
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</connection>
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<connection name="part0_buzzer" component1="part0" component2="buzzer">
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<connection_map name="part0_buzzer_1" c1_st_index="7" c1_end_index="7" c2_st_index="0" c2_end_index="0" />
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</connection>
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<connection name="part0_i2c0" component1="part0" component2="i2c0">
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<connection_map name="part0_i2c0_1" c1_st_index="8" c1_end_index="9" c2_st_index="0" c2_end_index="1" />
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</connection>
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</connections>
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</board> |