2014-12-05 12:30:48 +01:00
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/** Node type: GTFPGA (Xilinx ML507)
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*
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* This file implements the gtfpga subtype for nodes.
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*
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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2015-06-02 21:53:04 +02:00
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* @copyright 2014-2015, Institute for Automation of Complex Power Systems, EONERC
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* This file is part of S2SS. All Rights Reserved. Proprietary and confidential.
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2015-08-07 01:11:43 +02:00
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* Unauthorized copying of this file, via any medium is strictly prohibited.
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2015-06-02 21:53:04 +02:00
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*********************************************************************************/
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2015-05-07 13:04:06 +02:00
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2015-06-03 10:13:35 +02:00
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#include <stdio.h>
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2015-05-07 13:04:06 +02:00
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#include <inttypes.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/mman.h>
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2015-03-30 10:11:31 +02:00
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2015-06-02 21:53:04 +02:00
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#include "gtfpga.h"
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#include "utils.h"
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#include "timing.h"
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2015-09-19 12:14:35 +02:00
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#include "checks.h"
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2015-03-30 10:11:31 +02:00
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2015-05-07 13:04:06 +02:00
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static struct pci_access *pacc;
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static void gtfpga_debug(char *msg, ...) {
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va_list ap;
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va_start(ap, msg);
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log_vprint(DEBUG, msg, ap);
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va_end(ap);
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}
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2015-03-31 14:28:21 +02:00
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2015-12-11 12:35:32 +01:00
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int gtfpga_init(int argc, char * argv[], config_setting_t *cfg)
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2015-03-30 10:11:31 +02:00
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{
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2015-09-30 11:12:16 +02:00
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if (check_root())
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error("The gtfpga node-type requires superuser privileges!");
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2015-03-31 14:28:21 +02:00
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pacc = pci_alloc(); /* Get the pci_access structure */
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2015-08-22 17:42:38 +02:00
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if (!pacc)
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error("Failed to allocate PCI access structure");
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2015-03-31 14:28:21 +02:00
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pci_init(pacc); /* Initialize the PCI library */
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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pacc->error = (log_cb_t) error; /* Replace logging and debug functions */
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pacc->warning = (log_cb_t) warn;
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pacc->debug = gtfpga_debug;
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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pci_scan_bus(pacc); /* We want to get the list of devices */
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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return 0;
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2015-03-31 14:28:21 +02:00
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}
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2015-03-30 10:11:31 +02:00
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2015-03-31 14:28:21 +02:00
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int gtfpga_deinit()
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{
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pci_cleanup(pacc);
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2015-05-07 13:04:06 +02:00
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return 0;
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2015-03-30 10:11:31 +02:00
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}
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2015-11-23 16:42:43 +01:00
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int gtfpga_parse(struct node *n, config_setting_t *cfg)
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2015-03-30 10:11:31 +02:00
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{
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2015-11-29 22:47:57 +01:00
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struct gtfpga *g = n->_vd;
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2015-03-31 14:28:21 +02:00
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2015-05-07 13:04:06 +02:00
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const char *slot, *id, *err;
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config_setting_t *cfg_slot, *cfg_id;
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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pci_filter_init(NULL, &g->filter);
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2015-05-07 13:04:06 +02:00
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cfg_slot = config_setting_get_member(cfg, "slot");
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if (cfg_slot) {
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slot = config_setting_get_string(cfg_slot);
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if (slot) {
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err = pci_filter_parse_slot(&g->filter, (char*) slot);
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if (err)
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2015-03-31 14:28:21 +02:00
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cerror(cfg_slot, "%s", err);
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}
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else
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cerror(cfg_slot, "Invalid slot format");
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}
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2015-03-30 10:11:31 +02:00
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2015-05-07 13:04:06 +02:00
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cfg_id = config_setting_get_member(cfg, "id");
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if (cfg_id) {
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id = config_setting_get_string(cfg_id);
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if (id) {
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err = pci_filter_parse_id(&g->filter, (char*) id);
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if (err)
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2015-03-31 14:28:21 +02:00
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cerror(cfg_id, "%s", err);
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}
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else
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cerror(cfg_slot, "Invalid id format");
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}
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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if (!config_setting_lookup_float(cfg, "rate", &g->rate))
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g->rate = 0;
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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return 0;
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}
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2015-09-22 12:58:37 +02:00
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char * gtfpga_print(struct node *n)
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2015-03-31 14:28:21 +02:00
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{
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2015-11-29 22:47:57 +01:00
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struct gtfpga *g = n->_vd;
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2015-09-22 12:58:37 +02:00
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char *buf = NULL;
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2015-05-07 13:04:06 +02:00
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if (g->dev) {
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2015-09-22 12:58:37 +02:00
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return strcatf(&buf, "rate=%.1f slot=%04"PRIx16":%02"PRIx8":%02"PRIx8".%"PRIx8
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2015-05-07 13:04:06 +02:00
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" id=%04"PRIx16":%04"PRIx16" class=%04"PRIx16" irq=%d (%s)", g->rate,
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g->dev->domain, g->dev->bus, g->dev->dev, g->dev->func, g->dev->vendor_id, g->dev->device_id,
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g->dev->device_class, g->dev->irq, g->name);
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}
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else {
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2015-09-22 12:58:37 +02:00
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return strcatf(&buf, "rate=%.1f slot=%02"PRIx8":%02"PRIx8".%"PRIx8" id=%04"PRIx16":%04"PRIx16, g->rate,
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2015-05-07 13:04:06 +02:00
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g->filter.bus, g->filter.device, g->filter.func,
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g->filter.vendor, g->filter.device);
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}
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2015-03-31 14:28:21 +02:00
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}
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static int gtfpga_load_driver(struct pci_dev *d)
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{
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FILE *f;
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char slot[16];
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2015-09-19 12:14:35 +02:00
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if (check_kernel_module("uio_pci_generic"))
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error("Missing kernel module: uio_pci_generic");
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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/* Prepare slot identifier */
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snprintf(slot, sizeof(slot), "%04x:%02x:%02x.%x",
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2015-05-07 13:04:06 +02:00
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d->domain, d->bus, d->dev, d->func);
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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/* Add new ID to uio_pci_generic */
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2015-09-19 15:28:28 +02:00
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f = fopen(SYSFS_PATH "/bus/pci/drivers/uio_pci_generic/new_id", "w");
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if (!f)
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2015-03-31 14:28:21 +02:00
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serror("Failed to add PCI id to uio_pci_generic driver");
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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debug(5, "Adding ID to uio_pci_generic module: %04x %04x", d->vendor_id, d->device_id);
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2015-03-31 14:28:21 +02:00
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fprintf(f, "%04x %04x", d->vendor_id, d->device_id);
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fclose(f);
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2015-08-07 01:11:43 +02:00
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2015-03-31 14:28:21 +02:00
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/* Bind to uio_pci_generic */
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f = fopen(SYSFS_PATH "/drivers/uio_pci_generic/bind", "w");
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if (!f)
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serror("Failed to add PCI id to uio_pci_generic driver");
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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debug(5, "Bind slot to uio_pci_generic module: %s", slot);
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2015-03-31 14:28:21 +02:00
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fprintf(f, "%s\n", slot);
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fclose(f);
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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return 0;
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2015-03-31 14:28:21 +02:00
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}
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static struct pci_dev * gtfpga_find_device(struct pci_filter *f)
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{
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struct pci_dev *d;
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2015-03-30 10:11:31 +02:00
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/* Iterate over all devices */
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2015-03-31 14:28:21 +02:00
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for (d = pacc->devices; d; d = d->next) {
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2015-05-07 13:04:06 +02:00
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if (pci_filter_match(f, d))
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2015-03-31 14:28:21 +02:00
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return d;
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2015-03-30 10:11:31 +02:00
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}
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return NULL;
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}
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2015-05-07 13:04:06 +02:00
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static int gtfpga_mmap(struct gtfpga *g)
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2015-03-30 10:11:31 +02:00
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{
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int fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (!fd)
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serror("Failed open()");
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long int addr = g->dev->base_addr[GTFPGA_BAR] & ~0xfff;
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int size = g->dev->size[GTFPGA_BAR];
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/* mmap() first BAR */
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2015-05-07 13:04:06 +02:00
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debug(5, "Setup mapping: mmap(NULL, %#x, PROT_READ | PROT_WRITE, MAP_SHARED, %u, %#lx)", size, fd, addr);
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2015-03-30 10:11:31 +02:00
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void *map = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr);
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if (map == MAP_FAILED)
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serror("Failed mmap()");
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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return 0;
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2015-03-30 10:11:31 +02:00
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}
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int gtfpga_open(struct node *n)
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{
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2015-11-29 22:47:57 +01:00
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struct gtfpga *g = n->_vd;
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2015-03-30 10:11:31 +02:00
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struct pci_dev *dev;
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int ret;
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2015-05-07 13:04:06 +02:00
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dev = gtfpga_find_device(&g->filter);
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2015-03-30 10:11:31 +02:00
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if (!dev)
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2015-05-07 13:04:06 +02:00
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error("No GTFPGA card found");
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2015-03-30 10:11:31 +02:00
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g->dev = dev;
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2015-05-07 13:04:06 +02:00
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g->name = alloc(512);
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2015-03-30 10:11:31 +02:00
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2015-05-07 13:04:06 +02:00
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gtfpga_load_driver(dev);
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gtfpga_mmap(g);
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2015-03-30 10:11:31 +02:00
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/* Show some debug infos */
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pci_fill_info(dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_CLASS); /* Fill in header info we need */
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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g->name = pci_lookup_name(pacc, g->name, 512, PCI_LOOKUP_DEVICE, dev->vendor_id, dev->device_id);
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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/* Setup timer */
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if (g->rate) {
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g->fd_irq = timerfd_create(CLOCK_MONOTONIC, 0);
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if (g->fd_irq < 0)
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serror("Failed to create timer");
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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struct itimerspec its = {
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2015-06-02 21:59:31 +02:00
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.it_interval = time_from_double(1 / g->rate),
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2015-10-14 09:55:06 +02:00
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.it_value = { 0, 1 }
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2015-05-07 13:04:06 +02:00
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};
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ret = timerfd_settime(g->fd_irq, 0, &its, NULL);
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if (ret)
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serror("Failed to start timer");
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}
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2015-09-22 13:20:20 +02:00
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else /** @todo implement UIO interrupts */
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2015-05-07 13:04:06 +02:00
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error("UIO irq not implemented yet. Use 'rate' setting");
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2015-08-07 01:11:43 +02:00
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2015-03-30 10:11:31 +02:00
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return 0;
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}
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int gtfpga_close(struct node *n)
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{
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2015-11-29 22:47:57 +01:00
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struct gtfpga *g = n->_vd;
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2015-03-30 10:11:31 +02:00
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2015-03-31 14:28:21 +02:00
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if (g->map)
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munmap(g->map, g->dev->size[GTFPGA_BAR]);
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2015-03-30 10:11:31 +02:00
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close(g->fd_mmap);
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2015-05-07 13:04:06 +02:00
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close(g->fd_irq);
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free(g->name);
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2015-03-30 10:11:31 +02:00
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return 0;
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}
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2015-03-31 14:28:21 +02:00
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/** @todo implement */
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2016-01-14 22:59:57 +01:00
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int gtfpga_read(struct node *n, struct pool *pool, int cnt)
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2015-03-30 10:11:31 +02:00
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{
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2015-11-29 22:47:57 +01:00
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struct gtfpga *g = n->_vd;
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2016-01-14 22:59:57 +01:00
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//struct msg *m = pool_getrel(pool, 0);
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2015-08-07 01:11:43 +02:00
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2015-10-13 16:14:01 +02:00
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if (cnt != 1)
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error("The GTFPGA node type does not support combining!");
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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uint64_t runs;
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read(g->fd_irq, &runs, sizeof(runs));
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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static int seq;
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2015-08-07 01:11:43 +02:00
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2015-05-07 13:04:06 +02:00
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m->sequence = seq++;
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2015-03-30 10:11:31 +02:00
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return 0;
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}
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2015-03-31 14:28:21 +02:00
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/** @todo implement */
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2016-01-14 22:59:57 +01:00
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int gtfpga_write(struct node *n, struct pool *pool, int cnt)
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2015-03-30 10:11:31 +02:00
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{
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2015-11-29 22:47:57 +01:00
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// struct gtfpga *g = n->_vd;
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2016-01-14 22:59:57 +01:00
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// struct msg *m = pool_getrel(pool, 0);
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2015-10-13 16:14:01 +02:00
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if (cnt != 1)
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error("The GTFPGA node type does not support combining!");
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2015-03-30 10:11:31 +02:00
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return 0;
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}
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2015-11-23 16:44:01 +01:00
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static struct node_type vt = {
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.name = "gtfpga",
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.description = "GTFPGA PCIe card (libpci)",
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.parse = gtfpga_parse,
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.print = gtfpga_print,
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.open = gtfpga_open,
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.close = gtfpga_close,
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.read = gtfpga_read,
|
|
|
|
.write = gtfpga_write,
|
|
|
|
.init = gtfpga_init,
|
|
|
|
.deinit = gtfpga_deinit
|
|
|
|
};
|
|
|
|
|
|
|
|
REGISTER_NODE_TYPE(&vt)
|