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feat: add Zynq IP

Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
This commit is contained in:
Pascal Bauer 2025-03-10 17:55:29 +01:00 committed by Niklas Eiling
parent 07b199aa51
commit 0da8812511
3 changed files with 81 additions and 0 deletions

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@ -0,0 +1,46 @@
/* Zynq node
*
* Author: Pascal Bauer <pascal.bauer@rwth-aachen.de>
* SPDX-FileCopyrightText: 2023-2024 Pascal Bauer <pascal.bauer@rwth-aachen.de>
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <villas/fpga/node.hpp>
namespace villas {
namespace fpga {
namespace ip {
class Zynq : public Core {
public:
friend class ZynqFactory;
virtual bool init() override;
};
class ZynqFactory : CoreFactory {
public:
virtual std::string getName() const { return "Zynq"; }
virtual std::string getDescription() const {
return "Zynq based fpga";
}
private:
virtual Vlnv getCompatibleVlnv() const {
return Vlnv("xilinx.com:ip:zynq_ultra_ps_e:");
}
// Create a concrete IP instance
Core *make() const { return new Zynq; };
protected:
virtual void parse(Core &, json_t *) override;
};
} /* namespace ip */
} /* namespace fpga */
} /* namespace villas */

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@ -29,6 +29,7 @@ set(SOURCES
ips/i2c.cpp
ips/register.cpp
ips/axis_cache.cpp
ips/zynq.cpp
ips/rtds2gpu/rtds2gpu.cpp
ips/rtds2gpu/xrtds2gpu.c

34
fpga/lib/ips/zynq.cpp Normal file
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/* Zynq VFIO connector node
*
* Author: Pascal Bauer <pascal.bauer@rwth-aachen.de>
* SPDX-FileCopyrightText: 2023-2024 Pascal Bauer <pascal.bauer@rwth-aachen.de>
* SPDX-License-Identifier: Apache-2.0
*/
#include <villas/fpga/ips/zynq.hpp>
#include <villas/fpga/platform_card.hpp>
#include <villas/memory.hpp>
using namespace villas::fpga::ip;
bool Zynq::init() {
auto &mm = MemoryManager::get();
// Save ID in card so we can create mappings later when needed (e.g. when
// allocating DMA memory in host RAM)
this->card->addrSpaceIdDeviceToHost =
mm.findAddressSpace(getInstanceName() + "/HPC0_DDR_LOW");
// TODO: Use BusMasterInterfaces
// TODO: Multiple addressSpaces
return true;
}
void ZynqFactory::parse(Core &ip, json_t *cfg) {
CoreFactory::parse(ip, cfg);
auto logger = getLogger();
}
static ZynqFactory p;