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fpga: make compatible to new bitstream iteration

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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
Niklas Eiling 2024-11-15 10:36:26 +00:00
parent 0731e0953f
commit 1710bc48d4
3 changed files with 3 additions and 6 deletions
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1
fpga/include/villas/fpga/core.hpp
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@ -111,6 +111,7 @@ protected:
public:
size_t getBaseaddr() const { return baseaddr; }
const std::string &getInstanceName() const { return id.getName(); }
const std::string getAddressSpaceName() const {return getInstanceName() + "/" + getMemoryBlocks().front();}
// Operators

2
fpga/include/villas/fpga/ips/dino.hpp
View file

@ -131,7 +131,7 @@ public:
private:
virtual Vlnv getCompatibleVlnv() const {
return Vlnv("xilinx.com:module_ref:dinoif_fast:");
return Vlnv("xilinx.com:module_ref:dinoif_adc:");
}
Core *make() const { return new DinoAdc; };
};

6
fpga/lib/platform_card.cpp
View file

@ -131,11 +131,7 @@ void PlatformCard::connect(std::string device_name,
size_t srcVertexId = mm.getOrCreateAddressSpace(device_name);
// TODO: This is really bad!
std::string taget_address_space_name =
ip->getInstanceName() + "/Reg"; //? TODO: Reg neded?
size_t targetVertexId;
targetVertexId = mm.getOrCreateAddressSpace(taget_address_space_name);
size_t targetVertexId = mm.getOrCreateAddressSpace(ip->getAddressSpaceName());
mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId,
targetVertexId);