mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
update and reformat villas-fpga-ctrl
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
Niklas Eiling
Niklas Eiling
parent
897d916886
commit
1c2d8e440b
1 changed files with 208 additions and 207 deletions
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@ -7,13 +7,13 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <algorithm>
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#include <csignal>
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#include <iostream>
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#include <vector>
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#include <string>
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#include <algorithm>
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#include <jansson.h>
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#include <string>
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#include <thread>
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#include <vector>
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#include <CLI11.hpp>
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#include <rang.hpp>
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@ -22,262 +22,263 @@
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#include <villas/log.hpp>
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#include <villas/utils.hpp>
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#include <villas/fpga/core.hpp>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/vlnv.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/ips/rtds.hpp>
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#include <villas/fpga/core.hpp>
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#include <villas/fpga/ips/aurora_xilinx.hpp>
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#include <villas/fpga/ips/dino.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/ips/i2c.hpp>
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#include <villas/fpga/ips/rtds.hpp>
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#include <villas/fpga/utils.hpp>
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#include <villas/fpga/vlnv.hpp>
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using namespace villas;
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static std::shared_ptr<kernel::pci::DeviceList> pciDevices;
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static auto logger = villas::logging.get("ctrl");
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void writeToDmaFromStdIn(std::shared_ptr<villas::fpga::ip::Dma> dma)
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{
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auto &alloc = villas::HostRam::getAllocator();
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const std::shared_ptr<villas::MemoryBlock> block = alloc.allocateBlock(0x200 * sizeof(float));
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villas::MemoryAccessor<float> mem = *block;
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dma->makeAccesibleFromVA(block);
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void writeToDmaFromStdIn(std::shared_ptr<villas::fpga::ip::Dma> dma) {
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auto &alloc = villas::HostRam::getAllocator();
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const std::shared_ptr<villas::MemoryBlock> block =
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alloc.allocateBlock(0x200 * sizeof(float));
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villas::MemoryAccessor<float> mem = *block;
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dma->makeAccesibleFromVA(block);
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logger->info("Please enter values to write to the device, separated by ';'");
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logger->info("Please enter values to write to the device, separated by ';'");
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while (true) {
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// Read values from stdin
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std::string line;
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std::getline(std::cin, line);
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auto values = villas::utils::tokenize(line, ";");
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while (true) {
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// Read values from stdin
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std::string line;
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std::getline(std::cin, line);
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auto values = villas::utils::tokenize(line, ";");
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size_t i = 0;
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for (auto &value: values) {
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if (value.empty()) continue;
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size_t i = 0;
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for (auto &value : values) {
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if (value.empty())
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continue;
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const float number = std::stof(value);
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mem[i++] = number;
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}
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const float number = std::stof(value);
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mem[i++] = number;
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}
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// Initiate write transfer
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bool state = dma->write(*block, i * sizeof(float));
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if (!state)
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logger->error("Failed to write to device");
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// Initiate write transfer
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bool state = dma->write(*block, i * sizeof(float));
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if (!state)
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logger->error("Failed to write to device");
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auto writeComp = dma->writeComplete();
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logger->debug("Wrote {} bytes", writeComp.bytes);
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}
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// auto &alloc = villas::HostRam::getAllocator();
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auto writeComp = dma->writeComplete();
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logger->debug("Wrote {} bytes", writeComp.bytes);
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}
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// auto &alloc = villas::HostRam::getAllocator();
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// const std::shared_ptr<villas::MemoryBlock> block[] = {
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// alloc.allocateBlock(0x200 * sizeof(uint32_t)),
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// alloc.allocateBlock(0x200 * sizeof(uint32_t))
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// };
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// villas::MemoryAccessor<int32_t> mem[] = {*block[0], *block[1]};
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// const std::shared_ptr<villas::MemoryBlock> block[] = {
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// alloc.allocateBlock(0x200 * sizeof(uint32_t)),
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// alloc.allocateBlock(0x200 * sizeof(uint32_t))
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// };
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// villas::MemoryAccessor<int32_t> mem[] = {*block[0], *block[1]};
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// for (auto b : block) {
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// dma->makeAccesibleFromVA(b);
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// }
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// for (auto b : block) {
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// dma->makeAccesibleFromVA(b);
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// }
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// size_t cur = 0, next = 1;
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// std::ios::sync_with_stdio(false);
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// std::string line;
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// bool firstXfer = true;
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// size_t cur = 0, next = 1;
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// std::ios::sync_with_stdio(false);
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// std::string line;
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// bool firstXfer = true;
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// while(true) {
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// // Read values from stdin
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// while(true) {
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// // Read values from stdin
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// std::getline(std::cin, line);
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// auto values = villas::utils::tokenize(line, ";");
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// std::getline(std::cin, line);
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// auto values = villas::utils::tokenize(line, ";");
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// size_t i = 0;
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// for (auto &value: values) {
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// if (value.empty()) continue;
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// size_t i = 0;
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// for (auto &value: values) {
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// if (value.empty()) continue;
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// const float number = std::stof(value);
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// mem[cur][i++] = number;
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// }
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// const float number = std::stof(value);
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// mem[cur][i++] = number;
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// }
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// // Initiate write transfer
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// bool state = dma->write(*block[cur], i * sizeof(float));
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// if (!state)
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// logger->error("Failed to write to device");
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// // Initiate write transfer
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// bool state = dma->write(*block[cur], i * sizeof(float));
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// if (!state)
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// logger->error("Failed to write to device");
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// if (!firstXfer) {
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// auto bytesWritten = dma->writeComplete();
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// logger->debug("Wrote {} bytes", bytesWritten.bytes);
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// } else {
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// firstXfer = false;
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// }
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// if (!firstXfer) {
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// auto bytesWritten = dma->writeComplete();
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// logger->debug("Wrote {} bytes", bytesWritten.bytes);
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// } else {
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// firstXfer = false;
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// }
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// cur = next;
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// next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
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// }
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// cur = next;
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// next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
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// }
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}
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void readFromDmaToStdOut(std::shared_ptr<villas::fpga::ip::Dma> dma,
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std::unique_ptr<fpga::BufferedSampleFormatter> formatter)
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{
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auto &alloc = villas::HostRam::getAllocator();
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void readFromDmaToStdOut(
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std::shared_ptr<villas::fpga::ip::Dma> dma,
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std::unique_ptr<fpga::BufferedSampleFormatter> formatter) {
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auto &alloc = villas::HostRam::getAllocator();
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const std::shared_ptr<villas::MemoryBlock> block[] = {
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alloc.allocateBlock(0x200 * sizeof(uint32_t)),
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alloc.allocateBlock(0x200 * sizeof(uint32_t))
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};
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villas::MemoryAccessor<int32_t> mem[] = {*block[0], *block[1]};
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const std::shared_ptr<villas::MemoryBlock> block[] = {
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alloc.allocateBlock(0x200 * sizeof(uint32_t)),
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alloc.allocateBlock(0x200 * sizeof(uint32_t))};
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villas::MemoryAccessor<int32_t> mem[] = {*block[0], *block[1]};
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for (auto b : block) {
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dma->makeAccesibleFromVA(b);
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}
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for (auto b : block) {
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dma->makeAccesibleFromVA(b);
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}
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size_t cur = 0, next = 1;
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std::ios::sync_with_stdio(false);
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size_t cur = 0, next = 1;
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std::ios::sync_with_stdio(false);
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// Setup read transfer
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dma->read(*block[0], block[0]->getSize());
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// Setup read transfer
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dma->read(*block[0], block[0]->getSize());
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while (true) {
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logger->trace("Read from stream and write to address {}:{:p}", block[next]->getAddrSpaceId(), block[next]->getOffset());
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// We could use the number of interrupts to determine if we missed a chunk of data
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dma->read(*block[next], block[next]->getSize());
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auto c = dma->readComplete();
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while (true) {
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logger->trace("Read from stream and write to address {}:{:p}",
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block[next]->getAddrSpaceId(), block[next]->getOffset());
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// We could use the number of interrupts to determine if we missed a chunk of data
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dma->read(*block[next], block[next]->getSize());
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auto c = dma->readComplete();
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if (c.interrupts > 1) {
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logger->warn("Missed {} interrupts", c.interrupts - 1);
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}
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if (c.interrupts > 1) {
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logger->warn("Missed {} interrupts", c.interrupts - 1);
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}
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logger->debug("bytes: {}, intrs: {}, bds: {}",
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c.bytes, c.interrupts, c.bds);
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try {
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for (size_t i = 0; i*4 < c.bytes; i++) {
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int32_t ival = mem[cur][i];
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logger->debug("bytes: {}, intrs: {}, bds: {}", c.bytes, c.interrupts,
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c.bds);
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try {
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for (size_t i = 0; i * 4 < c.bytes; i++) {
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int32_t ival = mem[cur][i];
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wstrict-aliasing"
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float fval = *((float*)(&ival)); // cppcheck-suppress invalidPointerCast
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float fval =
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*((float *)(&ival)); // cppcheck-suppress invalidPointerCast
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#pragma GCC diagnostic pop
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formatter->format(fval);
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printf("%#x\n", ival);
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}
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formatter->output(std::cout);
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} catch (const std::exception &e) {
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logger->warn("Failed to output data: {}", e.what());
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}
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formatter->format(fval);
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printf("%#x\n", ival);
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}
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formatter->output(std::cout);
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} catch (const std::exception &e) {
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logger->warn("Failed to output data: {}", e.what());
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}
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cur = next;
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next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
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}
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cur = next;
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next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
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}
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}
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int main(int argc, char* argv[])
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{
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// Command Line Parser
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CLI::App app{"VILLASfpga data output"};
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int main(int argc, char *argv[]) {
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// Command Line Parser
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CLI::App app{"VILLASfpga data output"};
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try {
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std::string configFile;
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app.add_option("-c,--config", configFile, "Configuration file")
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->check(CLI::ExistingFile);
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try {
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std::string configFile;
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app.add_option("-c,--config", configFile, "Configuration file")
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->check(CLI::ExistingFile);
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std::string fpgaName = "vc707";
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app.add_option("--fpga", fpgaName, "Which FPGA to use");
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std::vector<std::string> connectStr;
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app.add_option(
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"-x,--connect", connectStr,
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"Connect a FPGA port with another or stdin/stdout");
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bool noDma = false;
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app.add_flag(
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"--no-dma", noDma,
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"Do not setup DMA, only setup FPGA and Crossbar links");
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std::string outputFormat = "short";
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app.add_option("--output-format", outputFormat,
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"Output format (short, long)");
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bool dumpGraph = false;
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app.add_flag(
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"--dump-graph", dumpGraph,
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"Dumps the graph of memory regions into \"graph.dot\"");
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bool dumpAuroraChannels = true;
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app.add_flag("--dump-aurora", dumpAuroraChannels, "Dumps the detected Aurora channels.");
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app.parse(argc, argv);
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std::string fpgaName = "vc707";
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app.add_option("--fpga", fpgaName, "Which FPGA to use");
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std::vector<std::string> connectStr;
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app.add_option("-x,--connect", connectStr,
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"Connect a FPGA port with another or stdin/stdout");
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bool noDma = false;
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app.add_flag("--no-dma", noDma,
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"Do not setup DMA, only setup FPGA and Crossbar links");
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std::string outputFormat = "short";
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app.add_option("--output-format", outputFormat,
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"Output format (short, long)");
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bool dumpGraph = false;
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app.add_flag("--dump-graph", dumpGraph,
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"Dumps the graph of memory regions into \"graph.dot\"");
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bool dumpAuroraChannels = true;
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app.add_flag("--dump-aurora", dumpAuroraChannels,
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"Dumps the detected Aurora channels.");
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app.parse(argc, argv);
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// Logging setup
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// Logging setup
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logging.setLevel(spdlog::level::debug);
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fpga::setupColorHandling();
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logging.setLevel(spdlog::level::debug);
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fpga::setupColorHandling();
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if (configFile.empty()) {
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logger->error("No configuration file provided/ Please use -c/--config argument");
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return 1;
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}
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if (configFile.empty()) {
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logger->error(
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"No configuration file provided/ Please use -c/--config argument");
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return 1;
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}
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auto card = fpga::setupFpgaCard(configFile, fpgaName);
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auto card = fpga::setupFpgaCard(configFile, fpgaName);
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std::vector<std::shared_ptr<fpga::ip::AuroraXilinx>> aurora_channels;
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for (int i = 0; i < 4; i++) {
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auto name = fmt::format("aurora_8b10b_ch{}", i);
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auto id = fpga::ip::IpIdentifier("xilinx.com:ip:aurora_8b10b:", name);
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auto aurora = std::dynamic_pointer_cast<fpga::ip::AuroraXilinx>(card->lookupIp(id));
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if (aurora == nullptr) {
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logger->error("No Aurora interface found on FPGA");
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return 1;
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}
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std::vector<std::shared_ptr<fpga::ip::AuroraXilinx>> aurora_channels;
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for (int i = 0; i < 4; i++) {
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auto name = fmt::format("aurora_aurora_8b10b_ch{}", i);
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auto id = fpga::ip::IpIdentifier("xilinx.com:ip:aurora_8b10b:", name);
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auto aurora =
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std::dynamic_pointer_cast<fpga::ip::AuroraXilinx>(card->lookupIp(id));
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if (aurora == nullptr) {
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logger->error("No Aurora interface found on FPGA");
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return 1;
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}
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aurora_channels.push_back(aurora);
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}
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aurora_channels.push_back(aurora);
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}
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auto dma = std::dynamic_pointer_cast<fpga::ip::Dma>
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(card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:")));
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if (dma == nullptr) {
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logger->error("No DMA found on FPGA ");
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return 1;
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}
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auto dma = std::dynamic_pointer_cast<fpga::ip::Dma>(
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card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:")));
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if (dma == nullptr) {
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logger->error("No DMA found on FPGA ");
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return 1;
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}
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if (dumpGraph) {
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auto &mm = MemoryManager::get();
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mm.getGraph().dump("graph.dot");
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}
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if (dumpGraph) {
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auto &mm = MemoryManager::get();
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mm.getGraph().dump("graph.dot");
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}
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if (dumpAuroraChannels) {
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for (auto aurora : aurora_channels)
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aurora->dump();
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}
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bool dstIsStdout = false;
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bool srcIsStdin = false;
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// Configure Crossbar switch
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for (std::string str : connectStr) {
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const fpga::ConnectString parsedConnectString(str);
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parsedConnectString.configCrossBar(dma, aurora_channels);
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dstIsStdout =
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dstIsStdout || parsedConnectString.isDstStdout();
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srcIsStdin = srcIsStdin || parsedConnectString.isSrcStdin();
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}
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if (dumpAuroraChannels) {
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for (auto aurora : aurora_channels)
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aurora->dump();
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}
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bool dstIsStdout = false;
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bool srcIsStdin = false;
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// Configure Crossbar switch
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for (std::string str : connectStr) {
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const fpga::ConnectString parsedConnectString(str);
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parsedConnectString.configCrossBar(dma, aurora_channels);
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dstIsStdout = dstIsStdout || parsedConnectString.isDstStdout();
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srcIsStdin = srcIsStdin || parsedConnectString.isSrcStdin();
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}
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std::unique_ptr<std::thread> stdInThread = nullptr;
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if (!noDma && dstIsStdout) {
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auto formatter =
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fpga::getBufferedSampleFormatter(outputFormat, 16);
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// We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it
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// in this thread anymore
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stdInThread = std::make_unique<std::thread>(
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readFromDmaToStdOut, dma, std::move(formatter));
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}
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if (!noDma && srcIsStdin) {
|
||||
writeToDmaFromStdIn(dma);
|
||||
}
|
||||
std::unique_ptr<std::thread> stdInThread = nullptr;
|
||||
if (!noDma && dstIsStdout) {
|
||||
auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16);
|
||||
// We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it
|
||||
// in this thread anymore
|
||||
stdInThread = std::make_unique<std::thread>(readFromDmaToStdOut, dma,
|
||||
std::move(formatter));
|
||||
}
|
||||
if (!noDma && srcIsStdin) {
|
||||
writeToDmaFromStdIn(dma);
|
||||
}
|
||||
|
||||
if (stdInThread) {
|
||||
stdInThread->join();
|
||||
}
|
||||
} catch (const RuntimeError &e) {
|
||||
logger->error("Error: {}", e.what());
|
||||
return -1;
|
||||
} catch (const CLI::ParseError &e) {
|
||||
return app.exit(e);
|
||||
} catch (const std::exception &e) {
|
||||
logger->error("Error: {}", e.what());
|
||||
return -1;
|
||||
} catch (...) {
|
||||
logger->error("Unknown error");
|
||||
return -1;
|
||||
}
|
||||
if (stdInThread) {
|
||||
stdInThread->join();
|
||||
}
|
||||
} catch (const RuntimeError &e) {
|
||||
logger->error("Error: {}", e.what());
|
||||
return -1;
|
||||
} catch (const CLI::ParseError &e) {
|
||||
return app.exit(e);
|
||||
} catch (const std::exception &e) {
|
||||
logger->error("Error: {}", e.what());
|
||||
return -1;
|
||||
} catch (...) {
|
||||
logger->error("Unknown error");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue