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Code Issues Releases Wiki Activity

Merge branch 'master' into update-lab16

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Alexandra 2024-10-25 09:50:05 +00:00
commit 2a08cde7c9
110 changed files with 417 additions and 343 deletions
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2
CODEOWNERS
View file

@ -35,5 +35,5 @@ fpga @n-eiling
# VFIO related files
/common/lib/kernel/pci.cpp @n-eiling
/common/lib/kernel/vfi_*.cpp @n-eiling
/common/include/villas/kernel/pci.hpp @n-eiling
/common/include/villas/kernel/devices/* @n-eiling
/common/include/villas/kernel/vfio_*.hpp @n-eiling

2
common/include/villas/graph/directed.hpp
View file

@ -31,7 +31,7 @@ public:
using Path = std::list<EdgeIdentifier>;
DirectedGraph(const std::string &name = "DirectedGraph")
: lastVertexId(0), lastEdgeId(0), logger(logging.get(name)) {}
: lastVertexId(0), lastEdgeId(0), logger(Log::get(name)) {}
std::shared_ptr<VertexType> getVertex(VertexIdentifier vertexId) const {
// Cannot use [] operator, because creates non-existing elements

30
common/include/villas/kernel/pci.hpp → common/include/villas/kernel/devices/pci_device.hpp
View file

@ -17,7 +17,7 @@
namespace villas {
namespace kernel {
namespace pci {
namespace devices {
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)
@ -58,15 +58,15 @@ struct Region {
unsigned long long flags;
};
class Device {
class PciDevice {
public:
Device(Id i, Slot s) : id(i), slot(s), log(logging.get("kernel:pci")) {}
PciDevice(Id i, Slot s) : id(i), slot(s), log(Log::get("kernel:pci")) {}
Device(Id i) : id(i), log(logging.get("kernel:pci")) {}
PciDevice(Id i) : id(i), log(Log::get("kernel:pci")) {}
Device(Slot s) : slot(s), log(logging.get("kernel:pci")) {}
PciDevice(Slot s) : slot(s), log(Log::get("kernel:pci")) {}
bool operator==(const Device &other);
bool operator==(const PciDevice &other);
// Get currently loaded driver for device
std::string getDriver() const;
@ -106,25 +106,25 @@ protected:
std::ios_base::out) const;
};
class DeviceList : public std::list<std::shared_ptr<Device>> {
class PciDeviceList : public std::list<std::shared_ptr<PciDevice>> {
private:
// Initialize Linux PCI handle.
//
// This search for all available PCI devices under /sys/bus/pci
DeviceList();
DeviceList &operator=(const DeviceList &);
static DeviceList *instance;
PciDeviceList();
PciDeviceList &operator=(const PciDeviceList &);
static PciDeviceList *instance;
public:
static DeviceList *getInstance();
static PciDeviceList *getInstance();
DeviceList::value_type lookupDevice(const Slot &s);
PciDeviceList::value_type lookupDevice(const Slot &s);
DeviceList::value_type lookupDevice(const Id &i);
PciDeviceList::value_type lookupDevice(const Id &i);
DeviceList::value_type lookupDevice(const Device &f);
PciDeviceList::value_type lookupDevice(const PciDevice &f);
};
} // namespace pci
} // namespace devices
} // namespace kernel
} // namespace villas

8
common/include/villas/kernel/vfio_container.hpp
View file

@ -35,8 +35,7 @@ static constexpr size_t EXTENSION_SIZE = VFIO_NOIOMMU_IOMMU + 1;
class Container {
public:
Container(std::vector<std::string> required_modules = {"vfio", "vfio_pci",
"vfio_iommu_type1"});
Container(std::vector<std::string> required_modules = {"vfio"});
// No copying allowed because we manage the vfio state in constructor and destructors
Container(Container const &) = delete;
@ -47,9 +46,10 @@ public:
void dump();
void attachGroup(std::shared_ptr<Group> group);
std::shared_ptr<Group> getOrAttachGroup(int index);
std::shared_ptr<Device> attachDevice(const std::string &name, int groupIndex);
std::shared_ptr<Device> attachDevice(pci::Device &pdev);
std::shared_ptr<Device> attachDevice(devices::PciDevice &pdev);
// Map VM to an IOVA, which is accessible by devices in the container
//
@ -65,8 +65,6 @@ public:
bool isIommuEnabled() const { return this->hasIommu; }
private:
std::shared_ptr<Group> getOrAttachGroup(int index);
int fd;
int version;

8
common/include/villas/kernel/vfio_device.hpp
View file

@ -19,7 +19,7 @@
#include <linux/vfio.h>
#include <sys/mman.h>
#include <villas/kernel/pci.hpp>
#include <villas/kernel/devices/pci_device.hpp>
#include <villas/log.hpp>
namespace villas {
@ -29,7 +29,7 @@ namespace vfio {
class Device {
public:
Device(const std::string &name, int groupFileDescriptor,
const kernel::pci::Device *pci_device = nullptr);
const kernel::devices::PciDevice *pci_device = nullptr);
~Device();
// No copying allowed because we manage the vfio state in constructor and destructors
@ -68,6 +68,8 @@ public:
void setAttachedToGroup() { this->attachedToGroup = true; }
int getNumberIrqs() const { return this->info.num_irqs; }
private:
// Name of the device as listed under
// /sys/kernel/iommu_groups/[vfio_group::index]/devices/
@ -89,7 +91,7 @@ private:
std::vector<void *> mappings;
// libpci handle of the device
const kernel::pci::Device *pci_device;
const kernel::devices::PciDevice *pci_device;
Logger log;
};

2
common/include/villas/kernel/vfio_group.hpp
View file

@ -48,7 +48,7 @@ public:
std::shared_ptr<Device> attachDevice(std::shared_ptr<Device> device);
std::shared_ptr<Device>
attachDevice(const std::string &name,
const kernel::pci::Device *pci_device = nullptr);
const kernel::devices::PciDevice *pci_device = nullptr);
bool checkStatus();
void dump();

19
common/include/villas/log.hpp
View file

@ -20,12 +20,7 @@
namespace villas {
// Forward declarations
class Log;
using Logger = std::shared_ptr<spdlog::logger>;
extern Log logging;
class Log {
public:
@ -64,7 +59,19 @@ public:
void parse(json_t *json);
Logger get(const std::string &name);
static Log &getInstance() {
// This will "leak" memory. Because we don't have a complex destructor it's okay
// that this will be cleaned up implicitly on program exit.
static auto log = new Log();
return *log;
};
Logger getNewLogger(const std::string &name);
static Logger get(const std::string &name) {
static auto &log = getInstance();
return log.getNewLogger(name);
}
void setFormatter(const std::string &pattern, const std::string &pfx = "");
void setLevel(Level lvl);

12
common/include/villas/memory.hpp
View file

@ -116,7 +116,7 @@ public:
// CRTP
derivedAlloc = static_cast<DerivedAllocator *>(this);
std::string loggerName = fmt::format("memory:", derivedAlloc->getName());
logger = logging.get(loggerName);
logger = Log::get(loggerName);
// Default deallocation callback
free = [&](MemoryBlock *mem) {
@ -249,10 +249,12 @@ public:
allocateBlock(size_t size);
};
static HostRamAllocator &getAllocator() { return allocator; }
private:
static HostRamAllocator allocator;
static HostRamAllocator &getAllocator() {
// This will "leak" memory. Because we don't have a complex destructor it's okay
// that this will be cleaned up implicitly on program exit.
static auto allocator = new HostRamAllocator();
return *allocator;
}
};
class HostDmaRam {

2
common/include/villas/memory_manager.hpp
View file

@ -65,7 +65,7 @@ class MemoryManager {
private:
// This is a singleton, so private constructor ...
MemoryManager()
: memoryGraph("memory:graph"), logger(logging.get("memory:manager")) {
: memoryGraph("memory:graph"), logger(Log::get("memory:manager")) {
pathCheckFunc = [&](const MemoryGraph::Path &path) {
return this->pathCheck(path);
};

4
common/include/villas/plugin.hpp
View file

@ -41,7 +41,7 @@ protected:
List<SubRegistry> registries;
public:
Logger getLogger() { return logging.get("plugin:registry"); }
Logger getLogger() { return Log::get("plugin:registry"); }
void add(Plugin *p) { plugins.push_back(p); }
@ -126,7 +126,7 @@ public:
virtual Logger getLogger() {
if (!logger) {
auto name = fmt::format("{}:{}", getType(), getName());
logger = logging.get(name);
logger = Log::get(name);
}
return logger;

8
common/include/villas/utils.hpp
View file

@ -52,7 +52,7 @@
#ifdef ALIGN
#undef ALIGN
#endif
#define ALIGN(x, a) ALIGN_MASK(x, (uintptr_t)(a)-1)
#define ALIGN(x, a) ALIGN_MASK(x, (uintptr_t)(a) - 1)
#define ALIGN_MASK(x, m) (((uintptr_t)(x) + (m)) & ~(m))
#define IS_ALIGNED(x, a) (ALIGN(x, a) == (uintptr_t)x)
@ -64,13 +64,13 @@
} while (0)
// Round-up integer division
#define CEIL(x, y) (((x) + (y)-1) / (y))
#define CEIL(x, y) (((x) + (y) - 1) / (y))
// Get nearest up-rounded power of 2
#define LOG2_CEIL(x) (1 << (villas::utils::log2i((x)-1) + 1))
#define LOG2_CEIL(x) (1 << (villas::utils::log2i((x) - 1) + 1))
// Check if the number is a power of 2
#define IS_POW2(x) (((x) != 0) && !((x) & ((x)-1)))
#define IS_POW2(x) (((x) != 0) && !((x) & ((x) - 1)))
// Calculate the number of elements in an array.
#define ARRAY_LEN(a) (sizeof(a) / sizeof(a)[0])

2
common/lib/CMakeLists.txt
View file

@ -39,7 +39,7 @@ endif()
if(CMAKE_SYSTEM_NAME STREQUAL Linux)
target_sources(villas-common PRIVATE
kernel/pci.cpp
kernel/devices/pci_device.cpp
kernel/vfio_device.cpp
kernel/vfio_group.cpp
kernel/vfio_container.cpp

51
common/lib/kernel/pci.cpp → common/lib/kernel/devices/pci_device.cpp
View file

@ -18,23 +18,23 @@
#include <villas/config.hpp>
#include <villas/exceptions.hpp>
#include <villas/kernel/pci.hpp>
#include <villas/kernel/devices/pci_device.hpp>
#include <villas/utils.hpp>
using namespace villas::kernel::pci;
using namespace villas::kernel::devices;
#define PCI_BASE_ADDRESS_N(n) (PCI_BASE_ADDRESS_0 + sizeof(uint32_t) * (n))
DeviceList *DeviceList::instance = nullptr;
PciDeviceList *PciDeviceList::instance = nullptr;
DeviceList *DeviceList::getInstance() {
PciDeviceList *PciDeviceList::getInstance() {
if (instance == nullptr) {
instance = new DeviceList();
instance = new PciDeviceList();
}
return instance;
};
DeviceList::DeviceList() {
PciDeviceList::PciDeviceList() {
struct dirent *e;
DIR *dp;
FILE *f;
@ -82,27 +82,28 @@ DeviceList::DeviceList() {
if (ret != 4)
throw RuntimeError("Failed to parse PCI slot number: {}", e->d_name);
emplace_back(std::make_shared<Device>(id, slot));
emplace_back(std::make_shared<PciDevice>(id, slot));
}
closedir(dp);
}
DeviceList::value_type DeviceList::lookupDevice(const Slot &s) {
return *std::find_if(begin(), end(), [s](const DeviceList::value_type &d) {
PciDeviceList::value_type PciDeviceList::lookupDevice(const Slot &s) {
return *std::find_if(begin(), end(), [s](const PciDeviceList::value_type &d) {
return d->slot == s;
});
}
DeviceList::value_type DeviceList::lookupDevice(const Id &i) {
return *std::find_if(begin(), end(), [i](const DeviceList::value_type &d) {
PciDeviceList::value_type PciDeviceList::lookupDevice(const Id &i) {
return *std::find_if(begin(), end(), [i](const PciDeviceList::value_type &d) {
return d->id == i;
});
}
DeviceList::value_type DeviceList::lookupDevice(const Device &d) {
auto dev = std::find_if(
begin(), end(), [d](const DeviceList::value_type &e) { return *e == d; });
PciDeviceList::value_type PciDeviceList::lookupDevice(const PciDevice &d) {
auto dev =
std::find_if(begin(), end(),
[d](const PciDeviceList::value_type &e) { return *e == d; });
return dev == end() ? value_type() : *dev;
}
@ -247,11 +248,11 @@ bool Slot::operator==(const Slot &s) {
return true;
}
bool Device::operator==(const Device &f) {
bool PciDevice::operator==(const PciDevice &f) {
return id == f.id && slot == f.slot;
}
std::list<Region> Device::getRegions() const {
std::list<Region> PciDevice::getRegions() const {
FILE *f;
char sysfs[1024];
@ -311,7 +312,7 @@ std::list<Region> Device::getRegions() const {
return regions;
}
std::string Device::getDriver() const {
std::string PciDevice::getDriver() const {
int ret;
char sysfs[1024], syml[1024];
memset(syml, 0, sizeof(syml));
@ -331,7 +332,7 @@ std::string Device::getDriver() const {
return basename(syml);
}
bool Device::attachDriver(const std::string &driver) const {
bool PciDevice::attachDriver(const std::string &driver) const {
FILE *f;
char fn[1024];
@ -363,7 +364,7 @@ bool Device::attachDriver(const std::string &driver) const {
return true;
}
uint32_t Device::readHostBar(unsigned barNum) const {
uint32_t PciDevice::readHostBar(unsigned barNum) const {
auto file = openSysFs("resource", std::ios_base::in);
std::string line;
@ -389,7 +390,7 @@ uint32_t Device::readHostBar(unsigned barNum) const {
return start;
}
void Device::rewriteBar(unsigned barNum) {
void PciDevice::rewriteBar(unsigned barNum) {
auto hostBar = readHostBar(barNum);
auto configBar = readBar(barNum);
@ -405,7 +406,7 @@ void Device::rewriteBar(unsigned barNum) {
writeBar(hostBar, barNum);
}
uint32_t Device::readBar(unsigned barNum) const {
uint32_t PciDevice::readBar(unsigned barNum) const {
uint32_t addr;
auto file = openSysFs("config", std::ios_base::in);
@ -415,14 +416,14 @@ uint32_t Device::readBar(unsigned barNum) const {
return addr;
}
void Device::writeBar(uint32_t addr, unsigned barNum) {
void PciDevice::writeBar(uint32_t addr, unsigned barNum) {
auto file = openSysFs("config", std::ios_base::out);
file.seekp(PCI_BASE_ADDRESS_N(barNum));
file.write(reinterpret_cast<char *>(&addr), sizeof(addr));
}
int Device::getIommuGroup() const {
int PciDevice::getIommuGroup() const {
int ret;
char *group;
@ -443,8 +444,8 @@ int Device::getIommuGroup() const {
return atoi(group);
}
std::fstream Device::openSysFs(const std::string &subPath,
std::ios_base::openmode mode) const {
std::fstream PciDevice::openSysFs(const std::string &subPath,
std::ios_base::openmode mode) const {
std::fstream file;
auto sysFsFilename =

8
common/lib/kernel/kernel.cpp
View file

@ -119,7 +119,7 @@ int villas::kernel::setModuleParam(const char *module, const char *param,
throw RuntimeError("Failed set parameter {} for kernel module {} to {}",
module, param, value);
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->debug("Set parameter {} of kernel module {} to {}", module, param,
value);
@ -134,7 +134,7 @@ int villas::kernel::loadModule(const char *module) {
ret = isModuleLoaded(module);
if (!ret) {
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->debug("Kernel module {} already loaded...", module);
return 0;
}
@ -193,7 +193,7 @@ int villas::kernel::getCmdlineParam(const char *param, char *buf, size_t len) {
do {
ret = sscanf(tok, "%127[^=]=%127s", key, value);
if (ret >= 1) {
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
if (ret >= 2)
logger->debug("Found kernel param: {}={}", key, value);
else
@ -220,7 +220,7 @@ int villas::kernel::getNrHugepages() {
f = fopen(PROCFS_PATH "/sys/vm/nr_hugepages", "r");
if (!f) {
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->error("Failed to open {}: {}", PROCFS_PATH "/sys/vm/nr_hugepages",
strerror(errno));
return -1;

8
common/lib/kernel/rt.cpp
View file

@ -26,7 +26,7 @@ namespace kernel {
namespace rt {
void init(int priority, int affinity) {
Logger logger = logging.get("kernel:rt");
Logger logger = Log::get("kernel:rt");
logger->info("Initialize sub-system");
@ -82,7 +82,7 @@ void setProcessAffinity(int affinity) {
assert(affinity != 0);
Logger logger = logging.get("kernel:rt");
Logger logger = Log::get("kernel:rt");
// Pin threads to CPUs by setting the affinity
CpuSet cset_pin(affinity);
@ -101,7 +101,7 @@ void setThreadAffinity(pthread_t thread, int affinity) {
assert(affinity != 0);
Logger logger = logging.get("kernel:rt");
Logger logger = Log::get("kernel:rt");
CpuSet cset_pin(affinity);
@ -119,7 +119,7 @@ void setPriority(int priority) {
struct sched_param param;
param.sched_priority = priority;
Logger logger = logging.get("kernel:rt");
Logger logger = Log::get("kernel:rt");
ret = sched_setscheduler(0, SCHED_FIFO, &param);
if (ret)

4
common/lib/kernel/vfio_container.cpp
View file

@ -68,7 +68,7 @@ static std::array<std::string, EXTENSION_SIZE> VFIO_EXTENSION_STR =
Container::Container(std::vector<std::string> required_modules)
: fd(-1), version(0), extensions(), iova_next(0), hasIommu(false), groups(),
log(logging.get("kernel:vfio:container")) {
log(Log::get("kernel:vfio:container")) {
for (auto module : required_modules) {
if (kernel::loadModule(module.c_str()) != 0) {
throw RuntimeError("Kernel module '{}' required but could not be loaded. "
@ -187,7 +187,7 @@ std::shared_ptr<Device> Container::attachDevice(const std::string &name,
return device;
}
std::shared_ptr<Device> Container::attachDevice(pci::Device &pdev) {
std::shared_ptr<Device> Container::attachDevice(devices::PciDevice &pdev) {
int ret;
char name[32], iommu_state[4];
static constexpr const char *kernelDriver = "vfio-pci";

8
common/lib/kernel/vfio_device.cpp
View file

@ -53,10 +53,10 @@ static const char *vfio_pci_irq_names[] = {
};
Device::Device(const std::string &name, int groupFileDescriptor,
const kernel::pci::Device *pci_device)
const kernel::devices::PciDevice *pci_device)
: name(name), fd(-1), attachedToGroup(false), groupFd(groupFileDescriptor),
info(), irqs(), regions(), mappings(), pci_device(pci_device),
log(logging.get("kernel:vfio:device")) {
log(Log::get("kernel:vfio:device")) {
if (groupFileDescriptor < 0)
throw RuntimeError("Invalid group file descriptor");
@ -293,8 +293,8 @@ int Device::pciMsiInit(int efds[]) {
}
int Device::pciMsiDeinit(int efds[]) {
logging.get("Device")->debug("Deinitializing MSI interrupts for device {}",
name);
Log::get("Device")->debug("Deinitializing MSI interrupts for device {}",
name);
// Check if this is really a vfio-pci device
if (not isVfioPciDevice())
return -1;

4
common/lib/kernel/vfio_group.cpp
View file

@ -38,7 +38,7 @@ using namespace villas::kernel::vfio;
Group::Group(int index, bool iommuEnabled)
: fd(-1), index(index), attachedToContainer(false), status(), devices(),
log(logging.get("kernel:vfio:group")) {
log(Log::get("kernel:vfio:group")) {
// Open group fd
std::stringstream groupPath;
groupPath << VFIO_PATH << (iommuEnabled ? "" : "noiommu-") << index;
@ -68,7 +68,7 @@ std::shared_ptr<Device> Group::attachDevice(std::shared_ptr<Device> device) {
std::shared_ptr<Device>
Group::attachDevice(const std::string &name,
const kernel::pci::Device *pci_device) {
const kernel::devices::PciDevice *pci_device) {
auto device = std::make_shared<Device>(name, fd, pci_device);
return attachDevice(device);
}

5
common/lib/log.cpp
View file

@ -20,9 +20,6 @@
using namespace villas;
// The global log instance
Log villas::logging;
static std::map<spdlog::level::level_enum, std::string> levelNames = {
{spdlog::level::trace, "trc"}, {spdlog::level::debug, "dbg"},
{spdlog::level::info, "info"}, {spdlog::level::warn, "warn"},
@ -69,7 +66,7 @@ int Log::getWidth() {
return width;
}
Logger Log::get(const std::string &name) {
Logger Log::getNewLogger(const std::string &name) {
Logger logger = spdlog::get(name);
if (not logger) {

4
common/lib/memory.cpp
View file

@ -143,8 +143,6 @@ LinearAllocator::allocateBlock(size_t size) {
return mem;
}
HostRam::HostRamAllocator HostRam::allocator;
HostRam::HostRamAllocator::HostRamAllocator()
: BaseAllocator(MemoryManager::get().getProcessAddressSpace()) {
free = [&](MemoryBlock *mem) {
@ -167,7 +165,7 @@ HostDmaRam::HostDmaRamAllocator::HostDmaRamAllocator(int num)
getUdmaBufBufSize(num)),
num(num) {
auto &mm = MemoryManager::get();
logger = logging.get(getName());
logger = Log::get(getName());
if (getSize() == 0) {
logger->error(

2
common/lib/memory_manager.cpp
View file

@ -164,7 +164,7 @@ MemoryTranslation::getForeignAddr(uintptr_t addrInLocalAddrSpace) const {
MemoryTranslation &
MemoryTranslation::operator+=(const MemoryTranslation &other) {
Logger logger = logging.get("MemoryTranslation");
Logger logger = Log::get("MemoryTranslation");
// Set level to debug to enable debug output
logger->set_level(spdlog::level::info);

8
common/lib/table.cpp
View file

@ -57,8 +57,8 @@ int Table::resize(int w) {
}
void Table::header() {
if (width != logging.getWidth())
resize(logging.getWidth());
if (width != Log::getInstance().getWidth())
resize(Log::getInstance().getWidth());
char *line1 = nullptr;
char *line2 = nullptr;
@ -107,8 +107,8 @@ void Table::header() {
}
void Table::row(int count, ...) {
if (width != logging.getWidth()) {
resize(logging.getWidth());
if (width != Log::getInstance().getWidth()) {
resize(Log::getInstance().getWidth());
header();
}

4
common/lib/terminal.cpp
View file

@ -23,7 +23,7 @@ Terminal::Terminal() {
isTty = isatty(STDERR_FILENO);
Logger logger = logging.get("terminal");
Logger logger = Log::get("terminal");
if (isTty) {
struct sigaction sa_resize;
@ -57,7 +57,7 @@ void Terminal::resize(int, siginfo_t *, void *) {
if (!current)
current = new Terminal();
Logger logger = logging.get("terminal");
Logger logger = Log::get("terminal");
int ret;

2
common/lib/tool.cpp
View file

@ -33,7 +33,7 @@ Tool::Tool(int ac, char *av[], const std::string &nme,
: argc(ac), argv(av), name(nme), handlerSignals(sigs) {
current_tool = this;
logger = logging.get(name);
logger = Log::get(name);
}
int Tool::run() {

2
common/lib/utils.cpp
View file

@ -87,7 +87,7 @@ int signalsInit(void (*cb)(int signal, siginfo_t *sinfo, void *ctx),
std::list<int> cbSignals, std::list<int> ignoreSignals) {
int ret;
Logger logger = logging.get("signals");
Logger logger = Log::get("signals");
logger->info("Initialize subsystem");

6
common/tests/unit/graph.cpp
View file

@ -18,7 +18,7 @@ using namespace villas;
TestSuite(graph, .description = "Graph library");
Test(graph, basic, .description = "DirectedGraph") {
Logger logger = logging.get("test:graph:basic");
Logger logger = Log::get("test:graph:basic");
villas::graph::DirectedGraph<> g("test:graph:basic");
logger->info("Testing basic graph construction and modification");
@ -48,7 +48,7 @@ Test(graph, basic, .description = "DirectedGraph") {
}
Test(graph, path, .description = "Find path") {
Logger logger = logging.get("test:graph:path");
Logger logger = Log::get("test:graph:path");
logger->info("Testing path finding algorithm");
using Graph = villas::graph::DirectedGraph<>;
@ -109,7 +109,7 @@ Test(graph, path, .description = "Find path") {
}
Test(graph, memory_manager, .description = "Global Memory Manager") {
Logger logger = logging.get("test:graph:mm");
Logger logger = Log::get("test:graph:mm");
auto &mm = villas::MemoryManager::get();
logger->info("Create address spaces");

6
flake.lock generated
View file

@ -2,11 +2,11 @@
"nodes": {
"nixpkgs": {
"locked": {
"lastModified": 1712666087,
"narHash": "sha256-WwjUkWsjlU8iUImbivlYxNyMB1L5YVqE8QotQdL9jWc=",
"lastModified": 1723320709,
"narHash": "sha256-DeKCsLQsS58D8TB/cTjXs2x8XMvsyv2JVxcF0Hu6pu8=",
"owner": "NixOS",
"repo": "nixpkgs",
"rev": "a76c4553d7e741e17f289224eda135423de0491d",
"rev": "e1d92cda6fd1bcec60e4938ce92fcee619eea793",
"type": "github"
},
"original": {

10
fpga/gpu/src/gpu.cpp
View file

@ -13,7 +13,7 @@
#include <memory>
#include <villas/gpu.hpp>
#include <villas/kernel/pci.hpp>
#include <villas/kernel/devices/pci_device.hpp>
#include <villas/log.hpp>
#include <villas/memory_manager.hpp>
@ -47,7 +47,7 @@ std::string villas::gpu::GpuAllocator::getName() const {
}
GpuFactory::GpuFactory()
: logger(villas::logging.get("gpu:factory")),
: logger(villas::Log::get("gpu:factory")),
Plugin("cuda", "CUDA capable GPUs") {}
// Required to be defined here for PIMPL to compile
@ -67,8 +67,8 @@ std::string Gpu::getName() const {
cudaDeviceProp deviceProp;
if (cudaGetDeviceProperties(&deviceProp, gpuId) != cudaSuccess) {
// Logger not yet availabe
villas::logging.get("gpu")->error("Cannot retrieve properties for GPU {}",
gpuId);
villas::Log::get("gpu")->error("Cannot retrieve properties for GPU {}",
gpuId);
throw std::exception();
}
@ -404,7 +404,7 @@ GpuAllocator::allocateBlock(size_t size) {
}
Gpu::Gpu(int gpuId) : pImpl{std::make_unique<impl>()}, gpuId(gpuId) {
logger = villas::logging.get(getName());
logger = villas::Log::get(getName());
pImpl->gdr = gdr_open();
if (pImpl->gdr == nullptr) {

9
fpga/include/villas/fpga/core.hpp
View file

@ -107,6 +107,7 @@ protected:
virtual std::list<MemoryBlockName> getMemoryBlocks() const { return {}; }
public:
size_t getBaseaddr() const { return baseaddr; }
const std::string &getInstanceName() const { return id.getName(); }
// Operators
@ -201,6 +202,8 @@ protected:
// AXI bus master interfaces to access memory somewhere
std::map<std::string, MemoryManager::AddressSpaceId> busMasterInterfaces;
size_t baseaddr = 0;
};
class CoreFactory : public plugin::Plugin {
@ -225,14 +228,12 @@ protected:
IRQ,
};
Logger getLogger() { return villas::logging.get(getName()); }
Logger getLogger() { return villas::Log::get(getName()); }
// Configure IP instance from JSON config
virtual void parse(Core &, json_t *) {}
static Logger getStaticLogger() {
return villas::logging.get("core:factory");
}
static Logger getStaticLogger() { return villas::Log::get("core:factory"); }
private:
virtual void configurePollingMode(Core &, PollingMode) {}

8
fpga/include/villas/fpga/ips/i2c.hpp
View file

@ -19,8 +19,7 @@ namespace fpga {
namespace ip {
#define I2C_SWTICH_ADDR 0x70
#define I2C_SWITCH_CHANNEL_MAP \
{ 0x20, 0x80, 0x02, 0x08, 0x10, 0x40, 0x01, 0x04 }
#define I2C_SWITCH_CHANNEL_MAP {0x20, 0x80, 0x02, 0x08, 0x10, 0x40, 0x01, 0x04}
#define I2C_IOEXT_ADDR 0x20
#define I2C_IOEXT_REG_DIR 0x03
#define I2C_IOEXT_REG_OUT 0x01
@ -45,10 +44,9 @@ public:
class Switch {
public:
Switch(I2c *i2c, uint8_t address,
Logger logger = villas::logging.get("i2c"))
Switch(I2c *i2c, uint8_t address, Logger logger = villas::Log::get("i2c"))
: i2c(i2c), address(address), channel(0), readOnce(false), switchLock(),
logger(logger){};
logger(logger) {};
Switch(const Switch &other) = delete;
Switch &operator=(const Switch &other) = delete;
void setChannel(uint8_t channel);

8
fpga/include/villas/fpga/pcie_card.hpp
View file

@ -19,7 +19,7 @@
#include <villas/memory.hpp>
#include <villas/plugin.hpp>
#include <villas/kernel/pci.hpp>
#include <villas/kernel/devices/pci_device.hpp>
#include <villas/kernel/vfio_container.hpp>
#include <villas/fpga/card.hpp>
@ -55,10 +55,10 @@ public: // TODO: make this private
bool doReset; // Reset VILLASfpga during startup?
int affinity; // Affinity for MSI interrupts
std::shared_ptr<kernel::pci::Device> pdev; // PCI device handle
std::shared_ptr<kernel::devices::PciDevice> pdev; // PCI device handle
protected:
Logger getLogger() const { return villas::logging.get(name); }
Logger getLogger() const { return villas::Log::get(name); }
};
class PCIeCardFactory : public plugin::Plugin {
@ -71,7 +71,7 @@ public:
static PCIeCard *make() { return new PCIeCard(); }
static Logger getStaticLogger() {
return villas::logging.get("pcie:card:factory");
return villas::Log::get("pcie:card:factory");
}
virtual std::string getName() const { return "pcie"; }

6
fpga/include/villas/fpga/utils.hpp
View file

@ -89,7 +89,7 @@ protected:
BufferedSampleFormatter(const size_t bufSamples, const size_t bufSampleSize)
: buf(bufSamples * bufSampleSize + 1), // Leave room for a final `\0'
bufSamples(bufSamples), bufSampleSize(bufSampleSize),
currentBufLoc(0){};
currentBufLoc(0) {};
BufferedSampleFormatter() = delete;
BufferedSampleFormatter(const BufferedSampleFormatter &) = delete;
virtual char *nextBufPos() { return &buf[(currentBufLoc++) * bufSampleSize]; }
@ -98,7 +98,7 @@ protected:
class BufferedSampleFormatterShort : public BufferedSampleFormatter {
public:
BufferedSampleFormatterShort(size_t bufSizeInSamples)
: BufferedSampleFormatter(bufSizeInSamples, formatStringSize){};
: BufferedSampleFormatter(bufSizeInSamples, formatStringSize) {};
virtual void format(float value) override {
size_t chars;
@ -119,7 +119,7 @@ class BufferedSampleFormatterLong : public BufferedSampleFormatter {
public:
BufferedSampleFormatterLong(size_t bufSizeInSamples)
: BufferedSampleFormatter(bufSizeInSamples, formatStringSize),
sampleCnt(0){};
sampleCnt(0) {};
virtual void format(float value) override {
if (std::snprintf(nextBufPos(), formatStringSize + 1, formatString,

12
fpga/lib/core.cpp
View file

@ -126,10 +126,20 @@ CoreFactory::configureIps(std::list<IpIdentifier> orderedIps, json_t *json_ips,
// Setup generic IP type properties
ip->card = card;
ip->id = id;
ip->logger = villas::logging.get(id.getName());
ip->logger = villas::Log::get(id.getName());
json_t *json_ip = json_object_get(json_ips, id.getName().c_str());
// parse ip baseadress
json_t *json_parameters = json_object_get(json_ip, "parameters");
if (json_is_object(json_parameters)) {
json_int_t c_baseaddr = 0;
int baseaddress_found =
json_unpack(json_parameters, "{ s?: I }", "c_baseaddr", &c_baseaddr);
if (baseaddress_found == 0)
ip->baseaddr = c_baseaddr;
}
json_t *json_irqs = json_object_get(json_ip, "irqs");
if (json_is_object(json_irqs)) {
logger->debug("Parse IRQs of {}", *ip);

6
fpga/lib/dma.cpp
View file

@ -21,8 +21,8 @@
using namespace villas;
static std::shared_ptr<kernel::pci::DeviceList> pciDevices;
static auto logger = villas::logging.get("villasfpga_dma");
static std::shared_ptr<kernel::devices::PciDeviceList> pciDevices;
static auto logger = villas::Log::get("villasfpga_dma");
struct villasfpga_handle_t {
std::shared_ptr<villas::fpga::Card> card;
@ -40,7 +40,7 @@ villasfpga_handle villasfpga_init(const char *configFile) {
bool dumpAuroraChannels = true;
try {
// Logging setup
logging.setLevel(spdlog::level::debug);
Log::getInstance().setLevel(spdlog::level::debug);
fpga::setupColorHandling();
if (configFile == nullptr || configFile[0] == '\0') {

45
fpga/lib/ips/dino.cpp
View file

@ -1,7 +1,7 @@
/* Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b)
*
* Author: Steffen Vogel <post@steffenvogel.de>
* SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University
* Author: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
* SPDX-FileCopyrightText: 2023-2024 Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
* SPDX-License-Identifier: Apache-2.0
*/
@ -141,23 +141,42 @@ void DinoAdc::setRegisterConfig(std::shared_ptr<Register> reg,
double sampleRate) {
constexpr double dinoClk = 25e6; // Dino is clocked with 25 Mhz
constexpr size_t dinoRegisterTimer = 0;
constexpr size_t dinoRegisterScale = 1;
constexpr size_t dinoRegisterOffset = 2;
constexpr size_t dinoRegisterAdcScale = 1;
constexpr size_t dinoRegisterAdcOffset = 2;
constexpr size_t dinoRegisterDacExternalTrig = 4;
constexpr size_t dinoRegisterStsActive = 5;
constexpr size_t dinoRegisterDacScale = 6;
constexpr size_t dinoRegisterDacOffset = 7;
uint32_t dinoTimerVal = static_cast<uint32_t>(dinoClk / sampleRate);
double rateError = dinoClk / dinoTimerVal - sampleRate;
reg->setRegister(
dinoRegisterTimer,
dinoTimerVal); // Timer value for generating ADC trigger signal
reg->setRegister(dinoRegisterScale,
-0.001615254F); // Scale factor for ADC value
reg->setRegister(dinoRegisterOffset, 10.8061F); // Offset for ADC value
uint32_t rate = reg->getRegister(0);
float scale = reg->getRegisterFloat(1);
float offset = reg->getRegisterFloat(2);
logging.get("Dino")->info("Check: Register configuration: Rate: {}, Scale: "
"{}, Offset: {}, Rate-Error: {} Hz",
rate, scale, offset, rateError);
// The following are calibration values for the ADC and DAC. Scale
// sets an factor to be multiplied with the input value. This is the
// raw 16 bit ADC value for the ADC and the float value from VILLAS for
// the DAC. Offset is a value to be added to the result of the multiplication.
// All values are IEE 754 single precision floating point values.
reg->setRegister(dinoRegisterAdcScale,
-0.001615254F); // Scale factor for ADC value
reg->setRegister(dinoRegisterAdcOffset, 10.8061F); // Offset for ADC value
reg->setRegister(dinoRegisterDacScale,
3448.53852516F); // Scale factor for DAC value
reg->setRegister(dinoRegisterDacOffset, 32767.5F); // Offset for DAC value
uint32_t rate = reg->getRegister(dinoRegisterTimer);
float adcScale = reg->getRegisterFloat(dinoRegisterAdcScale);
float adcOffset = reg->getRegisterFloat(dinoRegisterAdcOffset);
float dacScale = reg->getRegisterFloat(dinoRegisterDacScale);
float dacOffset = reg->getRegisterFloat(dinoRegisterDacOffset);
uint32_t dacExternalTrig = reg->getRegister(dinoRegisterDacExternalTrig);
uint32_t stsActive = reg->getRegister(dinoRegisterStsActive);
Log::get("Dino")->info(
"Check: Register configuration: TimerThresh: {}, Rate-Error: {} Hz, ADC "
"Scale: {}, ADC Offset: {}, DAC Scale: {}, DAC Offset: {}, DAC External "
"Trig: {:#x}, STS Active: {:#x}",
rate, rateError, adcScale, adcOffset, dacScale, dacOffset,
dacExternalTrig, stsActive);
}
DinoDac::DinoDac() : Dino() {}

4
fpga/lib/ips/dma.cpp
View file

@ -477,7 +477,7 @@ XAxiDma_Bd *Dma::readScatterGatherSetupBd(void *buf, size_t len) {
(uintptr_t)buf, (uintptr_t)bd, ret);
}
ret = XAxiDma_BdSetLength(curBd, readMsgSize, rxRing->MaxTransferLen);
ret = XAxiDma_BdSetLength(curBd, len, rxRing->MaxTransferLen);
if (ret != XST_SUCCESS) {
hwReadLock.unlock();
throw RuntimeError("Rx set length {} on BD {:x} failed {}", len,
@ -491,7 +491,7 @@ XAxiDma_Bd *Dma::readScatterGatherSetupBd(void *buf, size_t len) {
// TODO: Check if we really need this
XAxiDma_BdSetId(curBd, (uintptr_t)buf);
curBuf += readMsgSize;
curBuf += len;
curBd = (XAxiDma_Bd *)XAxiDma_BdRingNext(rxRing, curBd);
}
return bd;

20
fpga/lib/pcie_card.cpp
View file

@ -13,7 +13,8 @@
#include <villas/fpga/core.hpp>
#include <villas/fpga/node.hpp>
#include <villas/fpga/pcie_card.hpp>
#include <villas/kernel/pci.hpp>
#include <villas/kernel/devices/pci_device.hpp>
#include <villas/kernel/kernel.hpp>
#include <villas/kernel/vfio_container.hpp>
#include <villas/memory.hpp>
@ -23,8 +24,8 @@ using namespace villas::fpga;
// Instantiate factory to register
static PCIeCardFactory PCIeCardFactoryInstance;
static const kernel::pci::Device
defaultFilter((kernel::pci::Id(FPGA_PCI_VID_XILINX, FPGA_PCI_PID_VFPGA)));
static const kernel::devices::PciDevice defaultFilter(
(kernel::devices::Id(FPGA_PCI_VID_XILINX, FPGA_PCI_PID_VFPGA)));
std::shared_ptr<PCIeCard>
PCIeCardFactory::make(json_t *json_card, std::string card_name,
@ -32,6 +33,10 @@ PCIeCardFactory::make(json_t *json_card, std::string card_name,
const std::filesystem::path &searchPath) {
auto logger = getStaticLogger();
// make sure the vfio container has the required modules
kernel::loadModule("vfio_pci");
kernel::loadModule("vfio_iommu_type1");
json_t *json_ips = nullptr;
json_t *json_paths = nullptr;
const char *pci_slot = nullptr;
@ -58,15 +63,16 @@ PCIeCardFactory::make(json_t *json_card, std::string card_name,
card->doReset = do_reset != 0;
card->polling = (polling != 0);
kernel::pci::Device filter = defaultFilter;
kernel::devices::PciDevice filter = defaultFilter;
if (pci_id)
filter.id = kernel::pci::Id(pci_id);
filter.id = kernel::devices::Id(pci_id);
if (pci_slot)
filter.slot = kernel::pci::Slot(pci_slot);
filter.slot = kernel::devices::Slot(pci_slot);
// Search for FPGA card
card->pdev = kernel::pci::DeviceList::getInstance()->lookupDevice(filter);
card->pdev =
kernel::devices::PciDeviceList::getInstance()->lookupDevice(filter);
if (!card->pdev) {
logger->warn("Failed to find PCI device");
return nullptr;

4
fpga/lib/utils.cpp
View file

@ -31,7 +31,7 @@
using namespace villas;
static auto logger = villas::logging.get("streamer");
static auto logger = villas::Log::get("streamer");
std::shared_ptr<std::vector<std::shared_ptr<fpga::ip::Node>>>
fpga::getAuroraChannels(std::shared_ptr<fpga::Card> card) {
@ -52,7 +52,7 @@ fpga::getAuroraChannels(std::shared_ptr<fpga::Card> card) {
}
fpga::ConnectString::ConnectString(std::string &connectString, int maxPortNum)
: log(villas::logging.get("ConnectString")), maxPortNum(maxPortNum),
: log(villas::Log::get("ConnectString")), maxPortNum(maxPortNum),
bidirectional(false), invert(false), srcType(ConnectType::LOOPBACK),
dstType(ConnectType::LOOPBACK), srcAsInt(-1), dstAsInt(-1) {
parseString(connectString);

6
fpga/src/villas-fpga-ctrl.cpp
View file

@ -34,8 +34,8 @@
using namespace villas;
static std::shared_ptr<kernel::pci::DeviceList> pciDevices;
static auto logger = villas::logging.get("ctrl");
static std::shared_ptr<kernel::devices::PciDeviceList> pciDevices;
static auto logger = villas::Log::get("ctrl");
void writeToDmaFromStdIn(std::shared_ptr<villas::fpga::ip::Dma> dma) {
auto &alloc = villas::HostRam::getAllocator();
@ -203,7 +203,7 @@ int main(int argc, char *argv[]) {
// Logging setup
logging.setLevel(spdlog::level::trace);
Log::getInstance().setLevel(spdlog::level::trace);
logger->set_level(spdlog::level::trace);
fpga::setupColorHandling();

4
fpga/src/villas-fpga-pipe.cpp
View file

@ -27,8 +27,8 @@
using namespace villas;
static std::shared_ptr<kernel::pci::DeviceList> pciDevices;
static auto logger = villas::logging.get("streamer");
static std::shared_ptr<kernel::devices::PciDeviceList> pciDevices;
static auto logger = villas::Log::get("streamer");
int main(int argc, char *argv[]) {
// Command Line Parser

2
fpga/tests/unit/dma.cpp
View file

@ -20,7 +20,7 @@ using namespace villas;
// cppcheck-suppress unknownMacro
Test(fpga, dma, .description = "DMA") {
auto logger = logging.get("unit-test:dma");
auto logger = Log::get("unit-test:dma");
std::list<std::shared_ptr<fpga::ip::Dma>> dmaIps;

2
fpga/tests/unit/fifo.cpp
View file

@ -23,7 +23,7 @@ Test(fpga, fifo, .description = "FIFO") {
char src[255], dst[255];
size_t count = 0;
auto logger = logging.get("unit-test:fifo");
auto logger = Log::get("unit-test:fifo");
for (auto &ip : state.cards.front()->ips) {
// Skip non-fifo IPs

4
fpga/tests/unit/fpga.cpp
View file

@ -27,7 +27,7 @@
using namespace villas;
static kernel::pci::DeviceList *pciDevices;
static kernel::devices::PciDeviceList *pciDevices;
FpgaState state;
@ -40,7 +40,7 @@ static void init() {
plugin::registry->dump();
pciDevices = kernel::pci::DeviceList::getInstance();
pciDevices = kernel::devices::PciDeviceList::getInstance();
auto vfioContainer = std::make_shared<kernel::vfio::Container>();

2
fpga/tests/unit/gpu.cpp
View file

@ -26,7 +26,7 @@ using namespace villas;
// cppcheck-suppress unknownMacro
Test(fpga, gpu_dma, .description = "GPU DMA tests") {
auto logger = logging.get("unit-test:dma");
auto logger = Log::get("unit-test:dma");
auto &card = state.cards.front();

6
fpga/tests/unit/logging.cpp
View file

@ -41,7 +41,7 @@ static int format_msg(char *buf, size_t buflen, const char *msg, va_list args) {
}
void criterion_log_noformat(enum criterion_severity severity, const char *msg) {
auto logger = villas::logging.get("criterion");
auto logger = villas::Log::get("criterion");
switch (severity) {
case CR_LOG_INFO:
@ -67,7 +67,7 @@ void criterion_vlog(enum criterion_logging_level level, const char *msg,
format_msg(formatted_msg, sizeof(formatted_msg), msg, args);
auto logger = villas::logging.get("criterion");
auto logger = villas::Log::get("criterion");
logger->info(formatted_msg);
}
@ -85,7 +85,7 @@ void criterion_plog(enum criterion_logging_level level,
format_msg(formatted_msg, sizeof(formatted_msg), msg, args);
va_end(args);
auto logger = villas::logging.get("criterion");
auto logger = villas::Log::get("criterion");
if (strstr(formatted_msg, "Warning"))
logger->warn(formatted_msg);

2
fpga/tests/unit/main.cpp
View file

@ -35,7 +35,7 @@ static bool suite_enabled(struct criterion_test_set *tests, const char *name) {
// Limit number of parallel jobs to 1 in case we use the FPGA
ReportHook(PRE_ALL)(struct criterion_test_set *tests) {
if (suite_enabled(tests, "fpga")) {
auto logger = villas::logging.get("unittest");
auto logger = villas::Log::get("unittest");
logger->info("FPGA tests enabled. Only 1 job is executed in parallel!.");
criterion_options.jobs = 1;

2
fpga/tests/unit/rtds.cpp
View file

@ -29,7 +29,7 @@ using namespace villas::fpga::ip;
// cppcheck-suppress unknownMacro
Test(fpga, rtds, .description = "RTDS") {
auto logger = villas::logging.get("unit-test:rtds");
auto logger = villas::Log::get("unit-test:rtds");
std::list<villas::fpga::ip::RtdsGtfpga *> rtdsIps;
std::list<villas::fpga::ip::Dma *> dmaIps;

6
fpga/tests/unit/rtds2gpu.cpp
View file

@ -52,7 +52,7 @@ static void dumpMem(const uint32_t *addr, size_t len) {
// cppcheck-suppress unknownMacro
Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") {
auto logger = logging.get("unit-test:rtds2gpu");
auto logger = Log::get("unit-test:rtds2gpu");
for (auto &ip : state.cards.front()->ips) {
if (*ip != fpga::Vlnv("acs.eonerc.rwth-aachen.de:hls:rtds2gpu:"))
@ -158,7 +158,7 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu") {
// cppcheck-suppress unknownMacro
Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU") {
auto logger = logging.get("unit-test:rtds2gpu");
auto logger = Log::get("unit-test:rtds2gpu");
// Collect neccessary IPs
auto gpu2rtds = std::dynamic_pointer_cast<fpga::ip::Gpu2Rtds>(
@ -233,7 +233,7 @@ void gpu_rtds_rtt_stop();
// cppcheck-suppress unknownMacro
Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU") {
auto logger = logging.get("unit-test:rtds2gpu");
auto logger = Log::get("unit-test:rtds2gpu");
// Collect neccessary IPs
auto gpu2rtds = std::dynamic_pointer_cast<fpga::ip::Gpu2Rtds>(

2
fpga/tests/unit/timer.cpp
View file

@ -16,7 +16,7 @@
// cppcheck-suppress unknownMacro
Test(fpga, timer, .description = "Timer Counter") {
auto logger = villas::logging.get("unit-test:timer");
auto logger = villas::Log::get("unit-test:timer");
size_t count = 0;
for (auto &ip : state.cards.front()->ips) {

2
include/villas/api.hpp
View file

@ -14,8 +14,6 @@
#include <list>
#include <thread>
#include <libwebsockets.h>
#include <villas/common.hpp>
#include <villas/exceptions.hpp>
#include <villas/log.hpp>

8
include/villas/formats/protobuf.hpp
View file

@ -7,13 +7,8 @@
#pragma once
#include <cstdlib>
#include <villas/format.hpp>
// Generated message descriptors by protoc
#include <villas.pb-c.h>
namespace villas {
namespace node {
@ -22,9 +17,6 @@ struct Sample;
class ProtobufFormat : public BinaryFormat {
protected:
enum SignalType detect(const Villas__Node__Value *val);
public:
using BinaryFormat::BinaryFormat;

20
include/villas/nodes/ethercat.hpp
View file

@ -18,22 +18,17 @@
#include <villas/queue_signalled.h>
#include <villas/task.hpp>
namespace villas {
namespace node {
// Include hard-coded Ethercat Bus configuration
#include <villas/nodes/ethercat_config.hpp>
#define DEFAULT_ETHERCAT_QUEUE_LENGTH (DEFAULT_QUEUE_LENGTH * 64)
namespace villas::node {
// Forward declarations
class NodeCompat;
class SuperNode;
// Include hard-coded Ethercat Bus configuration
#include <villas/nodes/ethercat_config.hpp>
extern "C" {
#include <ecrt.h>
}
#define DEFAULT_ETHERCAT_QUEUE_LENGTH (DEFAULT_QUEUE_LENGTH * 64)
// Internal data per ethercat node
struct ethercat {
// Settings
@ -91,5 +86,4 @@ int ethercat_read(NodeCompat *n, struct Sample *const smps[], unsigned cnt);
int ethercat_write(NodeCompat *n, struct Sample *const smps[], unsigned cnt);
} // namespace node
} // namespace villas
} // namespace villas::node

4
include/villas/nodes/ethercat_config.hpp
View file

@ -25,6 +25,8 @@
#define ETHERCAT_PID_EL3008 0x0bc03052
#define ETHERCAT_PID_FC1100 0x044c0c62
namespace villas::node {
// TODO: Make PDO entry tables configurable
/* Master 0, Slave 3, "EL4038"
@ -168,3 +170,5 @@ static ec_sync_info_t slave_4_syncs[] = {
{2, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},
{3, EC_DIR_INPUT, 8, slave_4_pdos + 0, EC_WD_DISABLE},
{0xff}};
} // namespace villas::node

5
include/villas/nodes/fpga.hpp
View file

@ -15,6 +15,7 @@
#include <villas/node/config.hpp>
#include <villas/timing.hpp>
#include <stdint.h>
#include <villas/fpga/card.hpp>
#include <villas/fpga/ips/dma.hpp>
#include <villas/fpga/node.hpp>
@ -61,7 +62,11 @@ protected:
std::shared_ptr<fpga::Card> card;
std::shared_ptr<villas::fpga::ip::Dma> dma;
std::shared_ptr<villas::MemoryBlock> blockRx;
std::shared_ptr<MemoryAccessor<uint32_t>> accessorRxInt;
std::shared_ptr<MemoryAccessor<float>> accessorRxFloat;
std::shared_ptr<villas::MemoryBlock> blockTx;
std::shared_ptr<MemoryAccessor<uint32_t>> accessorTxInt;
std::shared_ptr<MemoryAccessor<float>> accessorTxFloat;
// Non-public methods
virtual int fastRead(Sample *smps[], unsigned cnt);

3
include/villas/nodes/iec61850.hpp
View file

@ -20,8 +20,7 @@
#include <villas/signal_list.hpp>
#ifndef CONFIG_GOOSE_DEFAULT_DST_ADDRESS
#define CONFIG_GOOSE_DEFAULT_DST_ADDRESS \
{ 0x01, 0x0c, 0xcd, 0x01, 0x00, 0x01 }
#define CONFIG_GOOSE_DEFAULT_DST_ADDRESS {0x01, 0x0c, 0xcd, 0x01, 0x00, 0x01}
#endif
namespace villas {

4
include/villas/nodes/test_rtt.hpp
View file

@ -58,7 +58,7 @@ protected:
: node(n), id(id), rate(rate), warmup(warmup), cooldown(cooldown),
values(values), count(count), sent(0), received(0), missed(0),
count_warmup(count_warmup), sent_warmup(0), received_warmup(0),
missed_warmup(0), filename(filename){};
missed_warmup(0), filename(filename) {};
int start();
int stop();
@ -96,7 +96,7 @@ public:
: Node(id, name), task(CLOCK_MONOTONIC), formatter(nullptr),
stream(nullptr), shutdown(false) {}
virtual ~TestRTT(){};
virtual ~TestRTT() {};
virtual int prepare();

2
lib/api.cpp
View file

@ -24,7 +24,7 @@ InvalidMethod::InvalidMethod(Request *req)
Session::methodToString(req->method)) {}
Api::Api(SuperNode *sn)
: logger(logging.get("api")), state(State::INITIALIZED), super_node(sn) {}
: logger(Log::get("api")), state(State::INITIALIZED), super_node(sn) {}
Api::~Api() {
if (state == State::STARTED)

2
lib/api/requests/restart.cpp
View file

@ -28,7 +28,7 @@ protected:
const char *argv[] = {"villas-node", cfg, nullptr};
Logger logger = logging.get("api:restart");
Logger logger = Log::get("api:restart");
if (cfg)
logger->info("Restarting instance: config={}", cfg);

2
lib/api/response.cpp
View file

@ -12,7 +12,7 @@
using namespace villas::node::api;
Response::Response(Session *s, int c, const std::string &ct, const Buffer &b)
: session(s), logger(logging.get("api:response")), buffer(b), code(c),
: session(s), logger(Log::get("api:response")), buffer(b), code(c),
contentType(ct),
headers{{"Server:", HTTP_USER_AGENT},
{"Access-Control-Allow-Origin:", "*"},

2
lib/api/session.cpp
View file

@ -21,7 +21,7 @@ using namespace villas::node;
using namespace villas::node::api;
Session::Session(lws *w)
: version(Version::VERSION_2), wsi(w), logger(logging.get("api:session")) {
: version(Version::VERSION_2), wsi(w), logger(Log::get("api:session")) {
lws_context *ctx = lws_get_context(wsi);
void *user_ctx = lws_context_user(ctx);

2
lib/config.cpp
View file

@ -27,7 +27,7 @@
using namespace villas;
using namespace villas::node;
Config::Config() : logger(logging.get("config")), root(nullptr) {}
Config::Config() : logger(Log::get("config")), root(nullptr) {}
Config::Config(const std::string &u) : Config() { root = load(u); }

2
lib/dumper.cpp
View file

@ -20,7 +20,7 @@ using namespace villas::node;
Dumper::Dumper()
: active(false), socketFd(0), socketPath(""), supressRepeatedWarning(true),
warningCounter(0), logger(logging.get("dumper")) {}
warningCounter(0), logger(Log::get("dumper")) {}
Dumper::~Dumper() { closeSocket(); }

3
lib/formats/CMakeLists.txt
View file

@ -25,6 +25,9 @@ if(DEFINED PROTOBUFC_COMPILER AND PROTOBUFC_FOUND)
COMMAND ${PROTOBUFC_COMPILER}
--c_out=${CMAKE_CURRENT_BINARY_DIR}
villas.proto
COMMAND ${CMAKE_COMMAND} -E copy
${CMAKE_CURRENT_BINARY_DIR}/villas.pb-c.h
${CMAKE_BINARY_DIR}/include/villas/formats/villas.pb-c.h
MAIN_DEPENDENCY villas.proto
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
)

5
lib/formats/protobuf.cpp
View file

@ -11,9 +11,12 @@
#include <villas/signal.hpp>
#include <villas/utils.hpp>
// Generated message descriptors by protoc
#include <villas/formats/villas.pb-c.h>
using namespace villas::node;
enum SignalType ProtobufFormat::detect(const Villas__Node__Value *val) {
static enum SignalType detect(const Villas__Node__Value *val) {
switch (val->value_case) {
case VILLAS__NODE__VALUE__VALUE_F:
return SignalType::FLOAT;

2
lib/hook.cpp
View file

@ -22,7 +22,7 @@ using namespace villas;
using namespace villas::node;
Hook::Hook(Path *p, Node *n, int fl, int prio, bool en)
: logger(logging.get("hook")), factory(nullptr),
: logger(Log::get("hook")), factory(nullptr),
state(fl & (int)Hook::Flags::BUILTIN
? State::CHECKED
: State::INITIALIZED), // We dont need to parse builtin hooks

19
lib/hooks/dp.cpp
View file

@ -27,7 +27,6 @@ protected:
char *signal_name;
unsigned signal_index;
int offset;
int inverse;
double f0;
@ -43,7 +42,7 @@ protected:
void step(double *in, std::complex<float> *out) {
int N = window.size();
__attribute__((unused)) std::complex<double> om_k, corr;
std::complex<double> om_k, corr;
double newest = *in;
__attribute__((unused)) double oldest = window.update(newest);
@ -97,8 +96,8 @@ protected:
public:
DPHook(Path *p, Node *n, int fl, int prio, bool en = true)
: Hook(p, n, fl, prio, en), signal_name(nullptr), signal_index(0),
offset(0), inverse(0), f0(50.0), timestep(50e-6), time(), steps(0),
coeffs(), fharmonics(), fharmonics_len(0) {}
inverse(0), f0(50.0), timestep(50e-6), time(), steps(0), coeffs(),
fharmonics(), fharmonics_len(0) {}
virtual ~DPHook() {
// Release memory
@ -122,6 +121,10 @@ public:
coeffs[i] = 0;
window = dsp::Window<double>((1.0 / f0) / timestep, 0.0);
if (window.size() == 0) {
throw RuntimeError(
"Windows size is 0: f0 * timestep < 1.0 not satisfied");
}
state = State::STARTED;
}
@ -221,7 +224,7 @@ public:
if (!new_sig)
throw RuntimeError("Failed to create signal");
signals->insert(signals->begin() + offset, new_sig);
signals->insert(signals->begin() + signal_index, new_sig);
} else {
auto orig_sig = signals->getByIndex(signal_index);
if (!orig_sig)
@ -240,7 +243,7 @@ public:
if (!new_sig)
throw RuntimeError("Failed to create new signal");
signals->insert(signals->begin() + offset, new_sig);
signals->insert(signals->begin() + signal_index, new_sig);
}
}
@ -277,7 +280,7 @@ public:
istep(coeffs, &signal);
sample_data_remove(smp, signal_index, fharmonics_len);
sample_data_insert(smp, (union SignalData *)&signal, offset, 1);
sample_data_insert(smp, (union SignalData *)&signal, signal_index, 1);
} else {
double signal = smp->data[signal_index].f;
std::complex<float> coeffs[fharmonics_len];
@ -285,7 +288,7 @@ public:
step(&signal, coeffs);
sample_data_remove(smp, signal_index, 1);
sample_data_insert(smp, (union SignalData *)coeffs, offset,
sample_data_insert(smp, (union SignalData *)coeffs, signal_index,
fharmonics_len);
}

4
lib/kernel/if.cpp
View file

@ -32,7 +32,7 @@ using namespace villas::kernel;
Interface::Interface(struct rtnl_link *link, int aff)
: nl_link(link), tc_qdisc(nullptr), affinity(aff) {
logger = logging.get(fmt::format("kernel:if:{}", getName()));
logger = Log::get(fmt::format("kernel:if:{}", getName()));
int n = getIRQs();
if (n)
@ -118,7 +118,7 @@ std::string Interface::getName() const {
Interface *Interface::getEgress(struct sockaddr *sa, SuperNode *sn) {
struct rtnl_link *link;
Logger logger = logging.get("kernel:if");
Logger logger = Log::get("kernel:if");
auto &interfaces = sn->getInterfaces();
auto affinity = sn->getAffinity();

4
lib/kernel/tc.cpp
View file

@ -50,7 +50,7 @@ int villas::kernel::tc::prio(Interface *i, struct rtnl_qdisc **qd,
*qd = q;
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->debug("Added prio qdisc with {} bands to interface '{}'", bands,
rtnl_link_get_name(i->nl_link));
@ -80,7 +80,7 @@ int villas::kernel::tc::mark(Interface *i, struct rtnl_cls **cls,
*cls = c;
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->debug("Added fwmark classifier with mark {} to interface '{}'", mark,
rtnl_link_get_name(i->nl_link));

2
lib/kernel/tc_netem.cpp
View file

@ -277,7 +277,7 @@ int villas::kernel::tc::netem(Interface *i, struct rtnl_qdisc **qd,
*qd = q;
auto logger = logging.get("kernel");
auto logger = Log::get("kernel");
logger->debug("Added netem qdisc to interface '{}'",
rtnl_link_get_name(i->nl_link));

2
lib/memory.cpp
View file

@ -31,7 +31,7 @@ static Logger logger;
int villas::node::memory::init(int hugepages) {
int ret;
logger = logging.get("memory");
logger = Log::get("memory");
logger->info("Initialize memory sub-system: #hugepages={}", hugepages);

2
lib/memory/ib.cpp
View file

@ -42,7 +42,7 @@ static struct Allocation *ib_alloc(size_t len, size_t alignment,
ma->address = ma->parent->address;
if (!mi->pd) {
auto logger = logging.get("memory:ib");
auto logger = Log::get("memory:ib");
logger->error("Protection domain is not registered!");
}

2
lib/memory/managed.cpp
View file

@ -145,7 +145,7 @@ struct Type *villas::node::memory::managed(void *ptr, size_t len) {
char *cptr = (char *)ptr;
if (len < sizeof(struct Type) + sizeof(struct Block)) {
auto logger = logging.get("memory:managed");
auto logger = Log::get("memory:managed");
logger->info("Passed region is too small");
return nullptr;
}

2
lib/memory/mmap.cpp
View file

@ -36,7 +36,7 @@ static size_t hugepgsz = -1;
static Logger logger;
int villas::node::memory::mmap_init(int hugepages) {
logger = logging.get("memory:mmap");
logger = Log::get("memory:mmap");
pgsz = kernel::getPageSize();
if (pgsz < 0)

2
lib/node.cpp
View file

@ -40,7 +40,7 @@ using namespace villas::node;
using namespace villas::utils;
Node::Node(const uuid_t &id, const std::string &name)
: logger(logging.get("node")), sequence_init(0), sequence(0),
: logger(Log::get("node")), sequence_init(0), sequence(0),
in(NodeDirection::Direction::IN, this),
out(NodeDirection::Direction::OUT, this), configPath(),
#ifdef __linux__

2
lib/node_list.cpp
View file

@ -37,7 +37,7 @@ int NodeList::parse(json_t *json, NodeList &all) {
size_t index;
json_t *elm;
auto logger = logging.get("node");
auto logger = Log::get("node");
switch (json_typeof(json)) {
case JSON_STRING:

2
lib/nodes/ethercat.cpp
View file

@ -125,7 +125,7 @@ int villas::node::ethercat_type_start(villas::node::SuperNode *sn) {
}
int villas::node::ethercat_type_stop() {
auto logger = logging.get("node:ethercat");
auto logger = Log::get("node:ethercat");
logger->info("Releasing EtherCAT master");

84
lib/nodes/fpga.cpp
View file

@ -14,6 +14,7 @@
#include <villas/exceptions.hpp>
#include <villas/log.hpp>
#include <villas/memory.hpp>
#include <villas/nodes/fpga.hpp>
#include <villas/sample.hpp>
#include <villas/super_node.hpp>
@ -36,7 +37,9 @@ static std::shared_ptr<kernel::vfio::Container> vfioContainer;
FpgaNode::FpgaNode(const uuid_t &id, const std::string &name)
: Node(id, name), cardName(""), connectStrings(), lowLatencyMode(false),
timestep(10e-3), card(nullptr), dma(), blockRx(), blockTx() {}
timestep(10e-3), card(nullptr), dma(), blockRx(), accessorRxInt(nullptr),
accessorRxFloat(nullptr), blockTx(), accessorTxInt(nullptr),
accessorTxFloat(nullptr) {}
FpgaNode::~FpgaNode() {}
@ -74,7 +77,7 @@ int FpgaNode::prepare() {
if (reg != nullptr &&
card->lookupIp(fpga::Vlnv("xilinx.com:module_ref:dinoif_fast:"))) {
fpga::ip::DinoAdc::setRegisterConfigTimestep(reg, 10e-3);
fpga::ip::DinoAdc::setRegisterConfigTimestep(reg, timestep);
} else {
logger->warn("No DinoAdc or no Register found on FPGA.");
}
@ -90,8 +93,10 @@ int FpgaNode::prepare() {
blockRx = alloc.allocateBlock(0x200 * sizeof(float));
blockTx = alloc.allocateBlock(0x200 * sizeof(float));
villas::MemoryAccessor<float> memRx = *blockRx;
villas::MemoryAccessor<float> memTx = *blockTx;
accessorRxInt = std::make_shared<MemoryAccessor<uint32_t>>(*blockRx);
accessorTxInt = std::make_shared<MemoryAccessor<uint32_t>>(*blockTx);
accessorRxFloat = std::make_shared<MemoryAccessor<float>>(*blockRx);
accessorTxFloat = std::make_shared<MemoryAccessor<float>>(*blockTx);
dma->makeAccesibleFromVA(blockRx);
dma->makeAccesibleFromVA(blockTx);
@ -183,12 +188,22 @@ const std::string &FpgaNode::getDetails() {
int FpgaNode::check() { return Node::check(); }
int FpgaNode::start() {
if (getOutputSignalsMaxCount() * sizeof(float) > blockRx->getSize()) {
if (getOutputSignalsMaxCount() * sizeof(float) > blockTx->getSize()) {
logger->error("Output signals exceed block size.");
throw villas ::RuntimeError("Output signals exceed block size.");
}
if (getInputSignalsMaxCount() * sizeof(float) > blockRx->getSize()) {
logger->error("Output signals exceed block size.");
throw villas ::RuntimeError("Output signals exceed block size.");
}
if (lowLatencyMode) {
dma->readScatterGatherPrepare(*blockRx, blockRx->getSize());
if (getInputSignalsMaxCount() != 0) {
dma->readScatterGatherPrepare(*blockRx,
getInputSignalsMaxCount() * sizeof(float));
} else {
logger->warn("No input signals defined. Not preparing read buffer - "
"reads will not work.");
}
if (getOutputSignalsMaxCount() != 0) {
dma->writeScatterGatherPrepare(*blockTx, getOutputSignalsMaxCount() *
sizeof(float));
@ -209,23 +224,18 @@ int FpgaNode::fastWrite(Sample *smps[], unsigned cnt) {
assert(cnt == 1 && smps != nullptr && smps[0] != nullptr);
auto mem = MemoryAccessor<uint32_t>(*blockTx);
float scaled;
for (unsigned i = 0; i < smp->length; i++) {
if (smp->signals->getByIndex(i)->type == SignalType::FLOAT) {
scaled = smp->data[i].f;
if (scaled > 10.) {
scaled = 10.;
} else if (scaled < -10.) {
scaled = -10.;
}
mem[i] = (scaled + 10.) * ((float)0xFFFF / 20.);
(*accessorTxFloat)[i] = static_cast<float>(smp->data[i].f);
;
} else {
mem[i] = smp->data[i].i;
(*accessorTxInt)[i] = static_cast<uint32_t>(smp->data[i].i);
}
}
logger->trace("Writing sample: {}, {}, {:#x}", smp->data[0].f,
signalTypeToString(smp->signals->getByIndex(0)->type),
smp->data[0].i);
dma->writeScatterGatherFast();
auto written = dma->writeScatterGatherPoll() /
sizeof(float); // The number of samples written
@ -243,18 +253,37 @@ int FpgaNode::fastWrite(Sample *smps[], unsigned cnt) {
// what we have received. fastRead is thus capable of partial reads.
int FpgaNode::fastRead(Sample *smps[], unsigned cnt) {
Sample *smp = smps[0];
auto mem = MemoryAccessor<float>(*blockRx);
smp->flags = (int)SampleFlags::HAS_DATA;
smp->signals = in.signals;
dma->readScatterGatherFast();
auto read = dma->readScatterGatherPoll(true);
size_t to_read = in.signals->size() * sizeof(uint32_t);
size_t read;
do {
dma->readScatterGatherFast();
read = dma->readScatterGatherPoll(true);
if (read < to_read) {
logger->warn("Read only {} bytes, but {} were expected", read, to_read);
}
} while (read < to_read);
// when we read less than expected we don't know what we missed so the data is
// useless. Thus, we discard what we read and try again.
// We assume a lot without checking at this point. All for the latency!
smp->length = 0;
for (unsigned i = 0; i < MIN(read / sizeof(float), smp->capacity); i++) {
smp->data[i].f = static_cast<double>(mem[i]);
for (unsigned i = 0; i < MIN(read / sizeof(uint32_t), smp->capacity); i++) {
if (i >= in.signals->size()) {
logger->warn(
"Received more data than expected. Maybe the descriptor cache needs "
"to be invalidated?. Ignoring the rest of the data.");
break;
}
if (in.signals->getByIndex(i)->type == SignalType::INTEGER) {
smp->data[i].i = static_cast<int64_t>((*accessorRxInt)[i]);
} else {
smp->data[i].f = static_cast<double>((*accessorRxFloat)[i]);
}
smp->length++;
}
@ -312,17 +341,10 @@ int FpgaNode::slowWrite(Sample *smps[], unsigned cnt) {
assert(cnt == 1 && smps != nullptr && smps[0] != nullptr);
auto mem = MemoryAccessor<uint32_t>(*blockTx);
float scaled;
auto mem = MemoryAccessor<float>(*blockTx);
for (unsigned i = 0; i < smps[0]->length; i++) {
scaled = smps[0]->data[i].f;
if (scaled > 10.) {
scaled = 10.;
} else if (scaled < -10.) {
scaled = -10.;
}
mem[i] = (scaled + 10.) * ((float)0xFFFF / 20.);
mem[i] = smps[0]->data[i].f;
}
bool state = dma->write(*blockTx, smp->length * sizeof(float));

43
lib/nodes/iec61850_sv.cpp
View file

@ -77,14 +77,9 @@ static void iec61850_sv_listener(SVSubscriber subscriber, void *ctx,
const char *sv_id = SVSubscriber_ASDU_getSvId(asdu);
int smp_cnt = SVSubscriber_ASDU_getSmpCnt(asdu);
int smp_mod = SVSubscriber_ASDU_getSmpMod(asdu);
int smp_synch = SVSubscriber_ASDU_getSmpSynch(asdu);
int conf_rev = SVSubscriber_ASDU_getConfRev(asdu);
size_t data_size = (size_t)SVSubscriber_ASDU_getDataSize(asdu);
n->logger->debug("Received sample: sv_id={}, smp_mod={}, smp_sync={}, "
"smp_cnt={}, conf_rev={}",
sv_id, smp_mod, smp_synch, smp_cnt, conf_rev);
n->logger->debug("Received sample: sv_id={}, smp_cnt={}", sv_id, smp_cnt);
smp = sample_alloc(&i->in.pool);
if (!smp) {
@ -335,8 +330,7 @@ int villas::node::iec61850_sv_start(NodeCompat *n) {
i->interface, i->in.check_dst_address);
i->in.receiver = r->sv;
i->in.subscriber =
SVSubscriber_create(i->dst_address.ether_addr_octet, i->app_id);
i->in.subscriber = SVSubscriber_create(nullptr, i->app_id);
// Install a callback handler for the subscriber
SVSubscriber_setListener(i->in.subscriber, iec61850_sv_listener, n);
@ -473,23 +467,21 @@ int villas::node::iec61850_sv_write(NodeCompat *n, struct Sample *const smps[],
unsigned off = 0;
for (unsigned k = 0; k < i->out.asdu_length; k++) {
struct iec61850_type_descriptor *td =
(struct iec61850_type_descriptor *)list_at(&i->out.signals, k);
auto *td = (struct iec61850_type_descriptor *)list_at(&i->out.signals, k);
auto sig = smp->signals->getByIndex(k);
int i_val = 0;
double f_val = 0;
SignalData data;
switch (td->iec_type) {
case IEC61850Type::INT8:
case IEC61850Type::INT32:
i_val = sample_format(smp, k) == SignalType::FLOAT ? smp->data[k].f
: smp->data[k].i;
case IEC61850Type::INT64:
data = smp->data[k].cast(sig->type, SignalType::INTEGER);
break;
case IEC61850Type::FLOAT32:
case IEC61850Type::FLOAT64:
f_val = sample_format(smp, k) == SignalType::FLOAT ? smp->data[k].f
: smp->data[k].i;
data = smp->data[k].cast(sig->type, SignalType::FLOAT);
break;
default: {
@ -497,20 +489,28 @@ int villas::node::iec61850_sv_write(NodeCompat *n, struct Sample *const smps[],
}
switch (td->iec_type) {
case IEC61850Type::BOOLEAN:
SVPublisher_ASDU_setINT8(i->out.asdu, off, data.b);
break;
case IEC61850Type::INT8:
SVPublisher_ASDU_setINT8(i->out.asdu, off, i_val);
SVPublisher_ASDU_setINT8(i->out.asdu, off, data.i);
break;
case IEC61850Type::INT32:
SVPublisher_ASDU_setINT32(i->out.asdu, off, i_val);
SVPublisher_ASDU_setINT32(i->out.asdu, off, data.i);
break;
case IEC61850Type::INT64:
SVPublisher_ASDU_setINT64(i->out.asdu, off, data.i);
break;
case IEC61850Type::FLOAT32:
SVPublisher_ASDU_setFLOAT(i->out.asdu, off, f_val);
SVPublisher_ASDU_setFLOAT(i->out.asdu, off, data.f);
break;
case IEC61850Type::FLOAT64:
SVPublisher_ASDU_setFLOAT64(i->out.asdu, off, f_val);
SVPublisher_ASDU_setFLOAT64(i->out.asdu, off, data.f);
break;
default: {
@ -524,8 +524,7 @@ int villas::node::iec61850_sv_write(NodeCompat *n, struct Sample *const smps[],
SVPublisher_ASDU_setSmpCnt(i->out.asdu, smp->sequence);
if (smp->flags & (int)SampleFlags::HAS_TS_ORIGIN) {
uint64_t t =
smp->ts.origin.tv_sec * 1000000000 + smp->ts.origin.tv_nsec;
uint64_t t = smp->ts.origin.tv_sec * 1000000000 + smp->ts.origin.tv_nsec;
SVPublisher_ASDU_setRefrTmNs(i->out.asdu, t);
}

2
lib/nodes/kafka.cpp
View file

@ -470,7 +470,7 @@ int villas::node::kafka_stop(NodeCompat *n) {
int villas::node::kafka_type_start(villas::node::SuperNode *sn) {
int ret;
logger = logging.get("node:kafka");
logger = Log::get("node:kafka");
ret = list_init(&clients);
if (ret)

2
lib/nodes/loopback_internal.cpp
View file

@ -35,7 +35,7 @@ InternalLoopbackNode::InternalLoopbackNode(Node *src, unsigned id, unsigned ql)
auto logger_name = fmt::format("node:{}", getNameShort());
logger = logging.get(logger_name);
logger = Log::get(logger_name);
in.signals = source->getInputSignals(false);

4
lib/nodes/mqtt.cpp
View file

@ -412,7 +412,7 @@ int villas::node::mqtt_type_start(villas::node::SuperNode *sn) {
return 0;
mosquitto_error:
auto logger = logging.get("node:mqtt");
auto logger = Log::get("node:mqtt");
logger->warn("{}", mosquitto_strerror(ret));
return ret;
@ -428,7 +428,7 @@ int villas::node::mqtt_type_stop() {
return 0;
mosquitto_error:
auto logger = logging.get("node:mqtt");
auto logger = Log::get("node:mqtt");
logger->warn("{}", mosquitto_strerror(ret));
return ret;

4
lib/nodes/ngsi.cpp
View file

@ -41,7 +41,7 @@ using namespace villas::utils;
static pthread_mutex_t *mutex_buf = NULL;
static void handle_error(const char *file, int lineno, const char *msg) {
auto logger = logging.get("curl");
auto logger = Log::get("curl");
logger->error("** {}:{} {}", file, lineno, msg);
@ -550,7 +550,7 @@ int villas::node::ngsi_type_start(villas::node::SuperNode *sn) {
CRYPTO_set_id_callback(curl_ssl_thread_id_function);
CRYPTO_set_locking_callback(curl_ssl_locking_function);
auto logger = logging.get("curl");
auto logger = Log::get("curl");
logger->info("Setup libcurl/openssl locking primitives");
#endif // CURL_SSL_REQUIRES_LOCKING

6
lib/nodes/opal.cpp
View file

@ -124,7 +124,7 @@ int villas::node::opal_type_start(villas::node::SuperNode *sn) {
if (err != EOK)
throw RuntimeError("Failed to get list of recv ids ({})", err);
auto logger = logging.get("node:opal");
auto logger = Log::get("node:opal");
logger->info("Started as OPAL Asynchronous process");
logger->info("This is VILLASnode %s (built on %s, %s)", PROJECT_BUILD_ID,
__DATE__, __TIME__);
@ -141,7 +141,7 @@ int villas::node::opal_type_stop() {
if (err != EOK)
throw RuntimeError("Failed to close shared memory area ({})", err);
auto logger = logging.get("node:opal");
auto logger = Log::get("node:opal");
logger->debug("Closing OPAL shared memory mapping");
err = OpalSystemCtrl_UnRegister((char *)printShmemName.c_str());
@ -155,7 +155,7 @@ int villas::node::opal_type_stop() {
}
static int opal_print_global() {
auto logger = logging.get("node:opal");
auto logger = Log::get("node:opal");
logger->debug("Controller ID: {}", params.controllerID);
std::stringstream sss, rss;

2
lib/nodes/redis.cpp
View file

@ -35,7 +35,7 @@ static std::unordered_map<sw::redis::ConnectionOptions, RedisConnection *>
RedisConnection::RedisConnection(const sw::redis::ConnectionOptions &opts)
: context(opts), subscriber(context.subscriber()),
logger(logging.get("nodes:redis")) {
logger(Log::get("nodes:redis")) {
// Enable keyspace notifications
context.command("config", "set", "notify-keyspace-events", "K$h");

2
lib/nodes/rtp.cpp
View file

@ -76,7 +76,7 @@ static int rtp_aimd(NodeCompat *n, double loss_frac) {
int villas::node::rtp_init(NodeCompat *n) {
auto *r = n->getData<struct rtp>();
n->logger = villas::logging.get("node:rtp");
n->logger = villas::Log::get("node:rtp");
// Default values
r->aimd.a = 10;

12
lib/nodes/temper.cpp
View file

@ -168,7 +168,7 @@ bool TEMPer1Device::match(struct libusb_device *dev) {
struct libusb_device_descriptor desc;
int ret = libusb_get_device_descriptor(dev, &desc);
if (ret < 0) {
logging.get("node:temper")
Log::get("node:temper")
->warn("Could not get USB device descriptor: {}",
libusb_strerror((enum libusb_error)ret));
return false;
@ -185,7 +185,7 @@ bool TEMPer2Device::match(struct libusb_device *dev) {
struct libusb_device_descriptor desc;
ret = libusb_get_device_descriptor(dev, &desc);
if (ret < 0) {
logging.get("node:temper")
Log::get("node:temper")
->warn("Could not get USB device descriptor: {}",
libusb_strerror((enum libusb_error)ret));
return false;
@ -193,7 +193,7 @@ bool TEMPer2Device::match(struct libusb_device *dev) {
ret = libusb_open(dev, &handle);
if (ret < 0) {
logging.get("node:temper")
Log::get("node:temper")
->warn("Failed to open USB device: {}",
libusb_strerror((enum libusb_error)ret));
return false;
@ -202,7 +202,7 @@ bool TEMPer2Device::match(struct libusb_device *dev) {
ret = libusb_get_string_descriptor_ascii(handle, desc.iProduct, product,
sizeof(product));
if (ret < 0) {
logging.get("node:temper")
Log::get("node:temper")
->warn("Could not get USB string descriptor: {}",
libusb_strerror((enum libusb_error)ret));
return false;
@ -217,7 +217,7 @@ bool TEMPerHUMDevice::match(struct libusb_device *dev) {
struct libusb_device_descriptor desc;
int ret = libusb_get_device_descriptor(dev, &desc);
if (ret < 0) {
logging.get("node:temper")
Log::get("node:temper")
->warn("Could not get USB device descriptor: {}",
libusb_strerror((enum libusb_error)ret));
return false;
@ -229,7 +229,7 @@ bool TEMPerHUMDevice::match(struct libusb_device *dev) {
int villas::node::temper_type_start(villas::node::SuperNode *sn) {
context = usb::get_context();
logger = logging.get("node:temper");
logger = Log::get("node:temper");
// Enumerate temper devices
devices.clear();

2
lib/nodes/uldaq.cpp
View file

@ -194,7 +194,7 @@ int villas::node::uldaq_type_start(villas::node::SuperNode *sn) {
if (err != ERR_NO_ERROR)
throw RuntimeError("Failed to retrieve DAQ device list");
auto logger = logging.get("node:uldaq");
auto logger = Log::get("node:uldaq");
logger->info("Found {} DAQ devices", num_devs);
for (unsigned i = 0; i < num_devs; i++) {
DaqDeviceDescriptor *desc = &descriptors[i];

2
lib/nodes/webrtc/peer_connection.cpp
View file

@ -32,7 +32,7 @@ PeerConnection::PeerConnection(const std::string &server,
rtc::DataChannelInit d)
: web(w), extraServers({}), dataChannelInit(d), defaultConfig(cfg),
conn(nullptr), chan(nullptr), out_signals(out_signals),
logger(logging.get("webrtc:pc")), stopStartup(false),
logger(Log::get("webrtc:pc")), stopStartup(false),
warnNotConnected(false), standby(true), first(false), firstID(INT_MAX),
secondID(INT_MAX), onMessageCallback(nullptr) {
client = std::make_shared<SignalingClient>(server, session, peer, web);

2
lib/nodes/webrtc/signaling_client.cpp
View file

@ -24,7 +24,7 @@ SignalingClient::SignalingClient(const std::string &server,
const std::string &session,
const std::string &peer, Web *w)
: retry_count(0), web(w), running(false),
logger(logging.get("webrtc:signal")) {
logger(Log::get("webrtc:signal")) {
int ret;
const char *prot, *a, *p;

2
lib/nodes/websocket.cpp
View file

@ -29,7 +29,7 @@ static std::list<struct websocket_connection *>
static std::mutex connections_lock;
static villas::node::Web *web;
static villas::Logger logger = logging.get("websocket");
static villas::Logger logger = Log::get("websocket");
// Forward declarations
static NodeCompatType p;

2
lib/path.cpp
View file

@ -113,7 +113,7 @@ Path::Path()
rate(0), // Disabled
affinity(0), enabled(true), poll(-1), reversed(false), builtin(true),
original_sequence_no(-1), queuelen(DEFAULT_QUEUE_LENGTH),
logger(logging.get(fmt::format("path:{}", id++))) {
logger(Log::get(fmt::format("path:{}", id++))) {
uuid_clear(uuid);
pool.state = State::DESTROYED;

2
lib/pool.cpp
View file

@ -17,7 +17,7 @@ using namespace villas;
int villas::node::pool_init(struct Pool *p, size_t cnt, size_t blocksz,
struct memory::Type *m) {
int ret;
auto logger = logging.get("pool");
auto logger = Log::get("pool");
// Make sure that we use a block size that is aligned to the size of a cache line
p->alignment = kernel::getCachelineSize();

2
lib/queue.cpp
View file

@ -46,7 +46,7 @@ int villas::node::queue_init(struct CQueue *q, size_t size,
size_t old_size = size;
size = LOG2_CEIL(size);
auto logger = logging.get("queue");
auto logger = Log::get("queue");
logger->warn("A queue size was changed from {} to {}", old_size, size);
}

10
lib/sample.cpp
View file

@ -311,7 +311,15 @@ void villas::node::sample_data_insert(struct Sample *smp,
void villas::node::sample_data_remove(struct Sample *smp, size_t offset,
size_t len) {
size_t sz = sizeof(smp->data[0]) * len;
if (offset + len > smp->length) {
if (offset > smp->length) {
return;
} else {
len = smp->length - offset;
}
}
size_t sz = sizeof(smp->data[0]) * (smp->length - offset - len);
memmove(&smp->data[offset], &smp->data[offset + len], sz);

4
lib/stats.cpp
View file

@ -93,7 +93,7 @@ enum Stats::Type Stats::lookupType(const std::string &str) {
throw std::invalid_argument("Invalid stats type");
}
Stats::Stats(int buckets, int warmup) : logger(logging.get("stats")) {
Stats::Stats(int buckets, int warmup) : logger(Log::get("stats")) {
for (auto m : metrics) {
histograms.emplace(std::piecewise_construct, std::forward_as_tuple(m.first),
std::forward_as_tuple(buckets, warmup));
@ -133,7 +133,7 @@ void Stats::printHeader(enum Format fmt) {
void Stats::setupTable() {
if (!table) {
auto logger = logging.get("stats");
auto logger = Log::get("stats");
table = std::make_shared<Table>(logger, columns);
}
}

4
lib/super_node.cpp
View file

@ -56,7 +56,7 @@ SuperNode::SuperNode()
kernel::nl::init(); // Fill link cache
#endif // WITH_NETEM
logger = logging.get("super_node");
logger = Log::get("super_node");
}
void SuperNode::parse(const std::string &u) {
@ -111,7 +111,7 @@ void SuperNode::parse(json_t *root) {
#endif // WITH_WEB
if (json_logging)
logging.parse(json_logging);
Log::getInstance().parse(json_logging);
// Parse nodes
if (json_nodes) {

2
lib/usb.cpp
View file

@ -78,7 +78,7 @@ struct libusb_context *villas::usb::init() {
int ret;
struct libusb_context *ctx;
logger = logging.get("usb");
logger = Log::get("usb");
ret = libusb_init(&ctx);
if (ret)

6
lib/web.cpp
View file

@ -101,7 +101,7 @@ void Web::lwsLogger(int lws_lvl, const char *msg) {
if (strstr(msg, "Unable to open") == msg)
lws_lvl = LLL_WARN;
Logger logger = logging.get("lws");
Logger logger = Log::get("lws");
switch (lws_lvl) {
case LLL_ERR:
@ -162,9 +162,9 @@ void Web::worker() {
}
Web::Web(Api *a)
: state(State::INITIALIZED), logger(logging.get("web")), context(nullptr),
: state(State::INITIALIZED), logger(Log::get("web")), context(nullptr),
vhost(nullptr), port(getuid() > 0 ? 8080 : 80), api(a) {
lws_set_log_level(lwsLogLevel(logging.getLevel()), lwsLogger);
lws_set_log_level(lwsLogLevel(Log::getInstance().getLevel()), lwsLogger);
}
Web::~Web() {

2
src/villas-compare.cpp
View file

@ -165,7 +165,7 @@ protected:
exit(EXIT_SUCCESS);
case 'd':
logging.setLevel(optarg);
Log::getInstance().setLevel(optarg);
break;
case 'h':

2
src/villas-convert.cpp
View file

@ -88,7 +88,7 @@ protected:
break;
case 'd':
logging.setLevel(optarg);
Log::getInstance().setLevel(optarg);
break;
case 'h':

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