1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00

fpga: add note about wrong cast

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
Niklas Eiling 2024-01-26 13:09:19 +01:00 committed by Niklas Eiling
parent 97a391c271
commit 4ca9c88bd0
2 changed files with 3 additions and 2 deletions

2
fpga

@ -1 +1 @@
Subproject commit 6c6d30c406769969cc91ea44015e55045ea0b94f
Subproject commit b2195075150532dde85daac92f800dd58ec6c668

View file

@ -155,7 +155,8 @@ int FpgaNode::_read(Sample *smps[], unsigned cnt) {
smp->length = 0;
for (unsigned i = 0; i < MIN(read, smp->capacity); i++) {
smp->data[i].f = static_cast<double>(mem[i]);
smp->data[i].f =
static_cast<double>(mem[i]); //TODO: This is the wrong cast!!!
smp->length++;
}
smp->flags = (int)SampleFlags::HAS_DATA;