refactor IpNode and IpCore class names

fpga/include/villas/fpga/card.hpp

@@ -42,7 +42,7 @@
 #include <villas/kernel/vfio.hpp>
 
 #include <villas/fpga/config.h>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 #define PCI_FILTER_DEFAULT_FPGA {		\
 	.id = {								\
@@ -75,9 +75,9 @@ public:
 	bool reset() { return true; }
 	void dump()  { }
 
-	ip::IpCore::Ptr lookupIp(const std::string& name) const;
-	ip::IpCore::Ptr lookupIp(const Vlnv& vlnv) const;
-	ip::IpCore::Ptr lookupIp(const ip::IpIdentifier& id) const;
+	ip::Core::Ptr lookupIp(const std::string& name) const;
+	ip::Core::Ptr lookupIp(const Vlnv& vlnv) const;
+	ip::Core::Ptr lookupIp(const ip::IpIdentifier& id) const;
 
 	bool
 	mapMemoryBlock(const MemoryBlock& block);
@@ -87,7 +87,7 @@ private:
 	std::set<MemoryManager::AddressSpaceId> memoryBlocksMapped;
 
 public:	// TODO: make this private
-	ip::IpCore::List ips;		///< IPs located on this FPGA card
+	ip::Core::List ips;		///< IPs located on this FPGA card
 
 	bool do_reset;			/**< Reset VILLASfpga during startup? */
 	int affinity;			/**< Affinity for MSI interrupts */

fpga/include/villas/fpga/core.hpp

@@ -51,8 +51,8 @@ class PCIeCard;
 namespace ip {
 
 // forward declarations
-class IpCore;
-class IpCoreFactory;
+class Core;
+class CoreFactory;
 class InterruptController;
 
 
@@ -98,15 +98,15 @@ private:
 };
 
 
-class IpCore {
-	friend IpCoreFactory;
+class Core {
+	friend CoreFactory;
 
 public:
-	IpCore() : card(nullptr) {}
-	virtual ~IpCore() = default;
+	Core() : card(nullptr) {}
+	virtual ~Core() = default;
 
-	using Ptr = std::shared_ptr<IpCore>;
-	using List = std::list<IpCore::Ptr>;
+	using Ptr = std::shared_ptr<Core>;
+	using List = std::list<Core::Ptr>;
 
 public:
 	/* Generic management interface for IPs */
@@ -168,15 +168,15 @@ public:
 	{ return getInstanceName() != otherName; }
 
 	bool
-	operator==(const IpCore& otherIp) const
+	operator==(const Core& otherIp) const
 	{ return this->id == otherIp.id; }
 
 	bool
-	operator!=(const IpCore& otherIp) const
+	operator!=(const Core& otherIp) const
 	{ return this->id != otherIp.id; }
 
 	friend std::ostream&
-	operator<< (std::ostream& stream, const IpCore& ip)
+	operator<< (std::ostream& stream, const Core& ip)
 	{ return stream << ip.id; }
 
 protected:
@@ -237,12 +237,12 @@ protected:
 
 
 
-class IpCoreFactory : public plugin::Plugin {
+class CoreFactory : public plugin::Plugin {
 public:
 	using plugin::Plugin::Plugin;
 
 	/// Returns a running and checked FPGA IP
-	static IpCore::List
+	static Core::List
 	make(PCIeCard* card, json_t *json_ips);
 
 protected:
@@ -252,20 +252,20 @@ protected:
 
 private:
 	/// Create a concrete IP instance
-	virtual IpCore* create() = 0;
+	virtual Core* create() = 0;
 
 	/// Configure IP instance from JSON config
-	virtual bool configureJson(IpCore& /* ip */, json_t* /* json */)
+	virtual bool configureJson(Core& /* ip */, json_t* /* json */)
 	{ return true; }
 
 	virtual Vlnv getCompatibleVlnv() const = 0;
 
 protected:
 	static Logger
-	getStaticLogger() { return villas::logging.get("IpCoreFactory"); }
+	getStaticLogger() { return villas::logging.get("CoreFactory"); }
 
 private:
-	static IpCoreFactory*
+	static CoreFactory*
 	lookup(const Vlnv& vlnv);
 };
 

fpga/include/villas/fpga/ips/aurora.hpp

@@ -27,13 +27,13 @@
 
 #pragma once
 
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
-class Aurora : public IpNode {
+class Aurora : public Node {
 public:
 	static constexpr const char* masterPort = "m_axis";
 	static constexpr const char* slavePort = "s_axis";
@@ -62,10 +62,10 @@ private:
 };
 
 
-class AuroraFactory : public IpNodeFactory {
+class AuroraFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Aurora; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/bram.hpp

@@ -27,14 +27,14 @@
 #pragma once
 
 #include <villas/memory.hpp>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
 
-class Bram : public IpCore
+class Bram : public Core
 {
 	friend class BramFactory;
 public:
@@ -56,12 +56,12 @@ private:
 
 
 
-class BramFactory : public IpCoreFactory {
+class BramFactory : public CoreFactory {
 public:
 
-	bool configureJson(IpCore& ip, json_t *json_ip);
+	bool configureJson(Core& ip, json_t *json_ip);
 
-	IpCore* create()
+	Core* create()
 	{ return new Bram; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/dma.hpp

@@ -29,13 +29,13 @@
 #include <xilinx/xaxidma.h>
 
 #include <villas/memory.hpp>
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
-class Dma : public IpNode
+class Dma : public Node
 {
 public:
 	friend class DmaFactory;
@@ -112,10 +112,10 @@ private:
 
 
 
-class DmaFactory : public IpNodeFactory {
+class DmaFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Dma; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/fifo.hpp

@@ -31,7 +31,7 @@
 
 #include <xilinx/xllfifo.h>
 
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 
 namespace villas {
@@ -39,7 +39,7 @@ namespace fpga {
 namespace ip {
 
 
-class Fifo : public IpNode
+class Fifo : public Node
 {
 public:
 	friend class FifoFactory;
@@ -63,10 +63,10 @@ private:
 
 
 
-class FifoFactory : public IpNodeFactory {
+class FifoFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Fifo; }
 
 	std::string
@@ -82,15 +82,15 @@ public:
 };
 
 
-class FifoData : public IpNode {
+class FifoData : public Node {
 	friend class FifoDataFactory;
 };
 
 
-class FifoDataFactory : public IpNodeFactory {
+class FifoDataFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new FifoData; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/gpio.hpp

@@ -30,14 +30,14 @@
 
 #include <xilinx/xintc.h>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
 
-class GeneralPurposeIO : public IpCore
+class GeneralPurposeIO : public Core
 {
 public:
 
@@ -51,14 +51,14 @@ private:
 	{ return { registerMemory }; }
 };
 
-class GeneralPurposeIOFactory : public IpCoreFactory {
+class GeneralPurposeIOFactory : public CoreFactory {
 public:
 
 	static constexpr const char*
 	getCompatibleVlnvString()
 	{ return "xilinx.com:ip:axi_gpio:"; }
 
-	IpCore* create()
+	Core* create()
 	{ return new GeneralPurposeIO; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/gpu2rtds.hpp

@@ -1,7 +1,7 @@
 #pragma once
 
 #include <villas/memory.hpp>
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 #include <villas/fpga/ips/hls.hpp>
 
 #include <villas/fpga/ips/rtds2gpu/register_types.hpp>
@@ -12,7 +12,7 @@ namespace fpga {
 namespace ip {
 
 
-class Gpu2Rtds : public IpNode, public Hls
+class Gpu2Rtds : public Node, public Hls
 {
 public:
 	friend class Gpu2RtdsFactory;
@@ -63,10 +63,10 @@ public:
 };
 
 
-class Gpu2RtdsFactory : public IpNodeFactory {
+class Gpu2RtdsFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Gpu2Rtds; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/hls.hpp

@@ -1,14 +1,14 @@
 #pragma once
 
 #include <villas/memory.hpp>
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
 
-class Hls : public virtual IpCore
+class Hls : public virtual Core
 {
 public:
 	virtual bool init()

fpga/include/villas/fpga/ips/intc.hpp

@@ -30,14 +30,14 @@
 
 #include <xilinx/xintc.h>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
 
-class InterruptController : public IpCore
+class InterruptController : public Core
 {
 public:
 	using IrqMaskType = uint32_t;
@@ -81,14 +81,14 @@ private:
 
 
 
-class InterruptControllerFactory : public IpCoreFactory {
+class InterruptControllerFactory : public CoreFactory {
 public:
 
 	static constexpr const char*
 	getCompatibleVlnvString()
 	{ return "acs.eonerc.rwth-aachen.de:user:axi_pcie_intc:"; }
 
-	IpCore* create()
+	Core* create()
 	{ return new InterruptController; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/pcie.hpp

@@ -32,13 +32,13 @@
 
 #include <xilinx/xaxis_switch.h>
 
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
-class AxiPciExpressBridge : public IpCore {
+class AxiPciExpressBridge : public Core {
 public:
 	friend class AxiPciExpressBridgeFactory;
 
@@ -63,16 +63,16 @@ private:
 };
 
 
-class AxiPciExpressBridgeFactory : public IpCoreFactory {
+class AxiPciExpressBridgeFactory : public CoreFactory {
 public:
 
 	static constexpr const char*
 	getCompatibleVlnvString()
 	{ return "xilinx.com:ip:axi_pcie:"; }
 
-	bool configureJson(IpCore& ip, json_t *json_ip);
+	bool configureJson(Core& ip, json_t *json_ip);
 
-	IpCore* create()
+	Core* create()
 	{ return new AxiPciExpressBridge; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/rtds.hpp

@@ -27,13 +27,13 @@
 
 #pragma once
 
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
-class Rtds : public IpNode {
+class Rtds : public Node {
 public:
 	static constexpr const char* masterPort = "m_axis";
 	static constexpr const char* slavePort = "s_axis";
@@ -60,9 +60,9 @@ private:
 };
 
 
-class RtdsFactory : public IpNodeFactory {
+class RtdsFactory : public NodeFactory {
 public:
-	IpCore* create()
+	Core* create()
 	{ return new Rtds; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/rtds2gpu.hpp

@@ -1,7 +1,7 @@
 #pragma once
 
 #include <villas/memory.hpp>
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 #include <villas/fpga/ips/hls.hpp>
 
 #include "rtds2gpu/xrtds2gpu.h"
@@ -25,7 +25,7 @@ union ControlRegister {
 };
 
 
-class Rtds2Gpu : public IpNode, public Hls
+class Rtds2Gpu : public Node, public Hls
 {
 public:
 	friend class Rtds2GpuFactory;
@@ -72,10 +72,10 @@ private:
 };
 
 
-class Rtds2GpuFactory : public IpNodeFactory {
+class Rtds2GpuFactory : public NodeFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Rtds2Gpu; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/switch.hpp

@@ -34,13 +34,13 @@
 
 #include <xilinx/xaxis_switch.h>
 
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
-class AxiStreamSwitch : public IpNode {
+class AxiStreamSwitch : public Node {
 public:
 	friend class AxiStreamSwitchFactory;
 
@@ -60,8 +60,8 @@ private:
 	{ return { registerMemory }; }
 
 	struct Path {
-		IpCore* masterOut;
-		IpCore* slaveIn;
+		Core* masterOut;
+		Core* slaveIn;
 	};
 
 	int num_ports;
@@ -70,16 +70,16 @@ private:
 };
 
 
-class AxiStreamSwitchFactory : public IpNodeFactory {
+class AxiStreamSwitchFactory : public NodeFactory {
 public:
 
 	static constexpr const char*
 	getCompatibleVlnvString()
 	{ return "xilinx.com:ip:axis_switch:"; }
 
-	bool configureJson(IpCore& ip, json_t *json_ip);
+	bool configureJson(Core& ip, json_t *json_ip);
 
-	IpCore* create()
+	Core* create()
 	{ return new AxiStreamSwitch; }
 
 	virtual std::string

fpga/include/villas/fpga/ips/timer.hpp

@@ -33,14 +33,14 @@
 #include <xilinx/xtmrctr.h>
 
 #include <villas/fpga/config.h>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 namespace villas {
 namespace fpga {
 namespace ip {
 
 
-class Timer : public IpCore
+class Timer : public Core
 {
 	friend class TimerFactory;
 public:
@@ -73,10 +73,10 @@ private:
 
 
 
-class TimerFactory : public IpCoreFactory {
+class TimerFactory : public CoreFactory {
 public:
 
-	IpCore* create()
+	Core* create()
 	{ return new Timer; }
 
 	virtual std::string

fpga/include/villas/fpga/node.hpp

@@ -34,7 +34,7 @@
 #include <string>
 #include <jansson.h>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 #include <villas/graph/directed.hpp>
 
@@ -85,10 +85,10 @@ public:
 };
 
 
-class IpNode : public virtual IpCore {
+class Node : public virtual Core {
 public:
 
-	friend class IpNodeFactory;
+	friend class NodeFactory;
 
 	struct StreamPort {
 		int portNumber;
@@ -107,7 +107,7 @@ public:
 
 	// easy-usage assuming that the slave IP to connect to only has one slave
 	// port and implements the getDefaultSlavePort() function
-	bool connect(const IpNode& slaveNode)
+	bool connect(const Node& slaveNode)
 	{ return this->connect(this->getDefaultMasterPort(), slaveNode.getDefaultSlavePort()); }
 
 	// used by easy-usage connect, will throw if not implemented by derived node
@@ -140,11 +140,11 @@ protected:
 	static StreamGraph streamGraph;
 };
 
-class IpNodeFactory : public IpCoreFactory {
+class NodeFactory : public CoreFactory {
 public:
-	using IpCoreFactory::IpCoreFactory;
+	using CoreFactory::CoreFactory;
 
-	virtual bool configureJson(IpCore& ip, json_t *json_ip);
+	virtual bool configureJson(Core& ip, json_t *json_ip);
 };
 
 /** @} */

fpga/lib/CMakeLists.txt

@@ -23,8 +23,8 @@
 set(SOURCES
 	vlnv.cpp
 	card.cpp
-	ip.cpp
-	ip_node.cpp
+	core.cpp
+	node.cpp
 
 	ips/timer.cpp
 	ips/switch.cpp

fpga/lib/card.cpp

@@ -29,7 +29,7 @@
 #include <villas/kernel/pci.h>
 #include <villas/kernel/vfio.hpp>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 #include <villas/fpga/card.hpp>
 
 namespace villas {
@@ -92,7 +92,7 @@ PCIeCardFactory::make(json_t *json, struct pci* pci, std::shared_ptr<VfioContain
 			continue;
 		}
 
-		card->ips = ip::IpCoreFactory::make(card.get(), json_ips);
+		card->ips = ip::CoreFactory::make(card.get(), json_ips);
 		if (card->ips.empty()) {
 			logger->error("Cannot initialize IPs of FPGA card {}", card_name);
 			continue;
@@ -136,7 +136,7 @@ PCIeCard::~PCIeCard()
 }
 
 
-ip::IpCore::Ptr
+ip::Core::Ptr
 PCIeCard::lookupIp(const std::string& name) const
 {
 	for (auto& ip : ips) {
@@ -149,7 +149,7 @@ PCIeCard::lookupIp(const std::string& name) const
 }
 
 
-ip::IpCore::Ptr
+ip::Core::Ptr
 PCIeCard::lookupIp(const Vlnv& vlnv) const
 {
 	for (auto& ip : ips) {
@@ -161,7 +161,7 @@ PCIeCard::lookupIp(const Vlnv& vlnv) const
 	return nullptr;
 }
 
-ip::IpCore::Ptr
+ip::Core::Ptr
 PCIeCard::lookupIp(const ip::IpIdentifier& id) const
 {
 	for (auto& ip : ips) {

fpga/lib/core.cpp

@@ -31,7 +31,7 @@
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/vlnv.hpp>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 #include <villas/fpga/ips/pcie.hpp>
 #include <villas/fpga/ips/intc.hpp>
 #include <villas/fpga/ips/switch.hpp>
@@ -52,8 +52,8 @@ vlnvInitializationOrder = {
 };
 
 
-IpCore::List
-IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
+Core::List
+CoreFactory::make(PCIeCard* card, json_t *json_ips)
 {
 	// We only have this logger until we know the factory to build an IP with
 	auto loggerStatic = getStaticLogger();
@@ -61,8 +61,8 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 	std::list<IpIdentifier> allIps;		// all IPs available in config
 	std::list<IpIdentifier> orderedIps;	// IPs ordered in initialization order
 
-	IpCore::List configuredIps;	// Successfully configured IPs
-	IpCore::List initializedIps;	// Initialized, i.e. ready-to-use IPs
+	Core::List configuredIps;	// Successfully configured IPs
+	Core::List initializedIps;	// Initialized, i.e. ready-to-use IPs
 
 
 	// parse all IP instance names and their VLNV into list `allIps`
@@ -112,29 +112,29 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 		// This is the magic part! Factories automatically register as a
 		// plugin as soon as they are instantiated. If there are multiple
 		// candidates, the first suitable factory will be used.
-		IpCoreFactory* ipCoreFactory = lookup(id.getVlnv());
+		CoreFactory* CoreFactory = lookup(id.getVlnv());
 
-		if (ipCoreFactory == nullptr) {
+		if (CoreFactory == nullptr) {
 			loggerStatic->warn("No plugin found to handle {}", id.getVlnv());
 			continue;
 		} else {
 			loggerStatic->debug("Using {} for IP {}",
-			                    ipCoreFactory->getName(), id.getVlnv());
+			                    CoreFactory->getName(), id.getVlnv());
 		}
 
-		auto logger = ipCoreFactory->getLogger();
+		auto logger = CoreFactory->getLogger();
 
 		// Create new IP instance. Since this function is virtual, it will
 		// construct the right, specialized type without knowing it here
 		// because we have already picked the right factory.
 		// If something goes wrong with initialization, the shared_ptr will
-		// take care to desctruct the IpCore again as it is not pushed to
+		// take care to desctruct the Core again as it is not pushed to
 		// the list and will run out of scope.
-		auto ip = std::unique_ptr<IpCore>(ipCoreFactory->create());
+		auto ip = std::unique_ptr<Core>(CoreFactory->create());
 
 		if (ip == nullptr) {
 			logger->warn("Cannot create an instance of {}",
-			             ipCoreFactory->getName());
+			             CoreFactory->getName());
 			continue;
 		}
 
@@ -255,7 +255,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 		}
 
 		// IP-specific setup via JSON config
-		if (not ipCoreFactory->configureJson(*ip, json_ip)) {
+		if (not CoreFactory->configureJson(*ip, json_ip)) {
 			logger->warn("Cannot configure IP from JSON");
 			continue;
 		}
@@ -318,7 +318,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 
 
 void
-IpCore::dump()
+Core::dump()
 {
 	logger->info("IP: {}", *this);
 	for (auto& [num, irq] : irqs) {
@@ -332,10 +332,10 @@ IpCore::dump()
 }
 
 
-IpCoreFactory*
-IpCoreFactory::lookup(const Vlnv &vlnv)
+CoreFactory*
+CoreFactory::lookup(const Vlnv &vlnv)
 {
-	for (auto& ip : plugin::Registry::lookup<IpCoreFactory>()) {
+	for (auto& ip : plugin::Registry::lookup<CoreFactory>()) {
 		if (ip->getCompatibleVlnv() == vlnv)
 			return ip;
 	}
@@ -345,7 +345,7 @@ IpCoreFactory::lookup(const Vlnv &vlnv)
 
 
 uintptr_t
-IpCore::getLocalAddr(const MemoryBlockName& block, uintptr_t address) const
+Core::getLocalAddr(const MemoryBlockName& block, uintptr_t address) const
 {
 	// throws exception if block not present
 	auto& translation = addressTranslations.at(block);
@@ -355,7 +355,7 @@ IpCore::getLocalAddr(const MemoryBlockName& block, uintptr_t address) const
 
 
 InterruptController*
-IpCore::getInterruptController(const std::string& interruptName) const
+Core::getInterruptController(const std::string& interruptName) const
 {
 	try {
 		const IrqPort irq = irqs.at(interruptName);

fpga/lib/ips/bram.cpp

@@ -29,7 +29,7 @@ namespace ip {
 static BramFactory factory;
 
 bool
-BramFactory::configureJson(IpCore& ip, json_t* json_ip)
+BramFactory::configureJson(Core& ip, json_t* json_ip)
 {
 	auto& bram = dynamic_cast<Bram&>(ip);
 

fpga/lib/ips/dma.cpp

@@ -394,7 +394,7 @@ Dma::isMemoryBlockAccesible(const MemoryBlock& mem, const std::string& interface
 void
 Dma::dump()
 {
-	IpCore::dump();
+	Core::dump();
 
 	logger->info("S2MM_DMACR:  {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_CR_OFFSET));
 	logger->info("S2MM_DMASR:  {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_SR_OFFSET));

fpga/lib/ips/pcie.cpp

@@ -122,7 +122,7 @@ AxiPciExpressBridge::init()
 }
 
 bool
-AxiPciExpressBridgeFactory::configureJson(IpCore& ip, json_t* json_ip)
+AxiPciExpressBridgeFactory::configureJson(Core& ip, json_t* json_ip)
 {
 	auto logger = getLogger();
 	auto& pcie = dynamic_cast<AxiPciExpressBridge&>(ip);

fpga/lib/ips/switch.cpp

@@ -136,9 +136,9 @@ AxiStreamSwitch::portNameToNum(const std::string& portName)
 }
 
 bool
-AxiStreamSwitchFactory::configureJson(IpCore& ip, json_t* json_ip)
+AxiStreamSwitchFactory::configureJson(Core& ip, json_t* json_ip)
 {
-	if (not IpNodeFactory::configureJson(ip, json_ip))
+	if (not NodeFactory::configureJson(ip, json_ip))
 		return false;
 
 	auto logger = getLogger();

fpga/lib/node.cpp

@@ -27,7 +27,7 @@
 #include <villas/utils.hpp>
 
 #include <villas/fpga/card.hpp>
-#include <villas/fpga/ip_node.hpp>
+#include <villas/fpga/node.hpp>
 #include <villas/fpga/ips/switch.hpp>
 
 namespace villas {
@@ -36,12 +36,12 @@ namespace ip {
 
 
 StreamGraph
-IpNode::streamGraph;
+Node::streamGraph;
 
 bool
-IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip)
+NodeFactory::configureJson(Core& ip, json_t* json_ip)
 {
-	auto& ipNode = dynamic_cast<IpNode&>(ip);
+	auto& Node = dynamic_cast<ip::Node&>(ip);
 	auto logger = getLogger();
 
 	json_t* json_ports = json_object_get(json_ip, "ports");
@@ -77,23 +77,23 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip)
 		const std::string role(role_raw);
 		const bool isMaster = (role == "master" or role == "initiator");
 
-		auto thisVertex = IpNode::streamGraph.getOrCreateStreamVertex(
+		auto thisVertex = Node::streamGraph.getOrCreateStreamVertex(
 		                      ip.getInstanceName(),
 		                      name_raw,
 		                      isMaster);
 
-		auto connectedVertex = IpNode::streamGraph.getOrCreateStreamVertex(
+		auto connectedVertex = Node::streamGraph.getOrCreateStreamVertex(
 		                           tokens[0],
 		                           tokens[1],
 		                           not isMaster);
 
 
 		if (isMaster) {
-			IpNode::streamGraph.addDefaultEdge(thisVertex->getIdentifier(),
+			Node::streamGraph.addDefaultEdge(thisVertex->getIdentifier(),
 			                                   connectedVertex->getIdentifier());
-			ipNode.portsMaster[name_raw] = thisVertex;
+			Node.portsMaster[name_raw] = thisVertex;
 		} else /* slave */ {
-			ipNode.portsSlave[name_raw] = thisVertex;
+			Node.portsSlave[name_raw] = thisVertex;
 		}
 	}
 
@@ -101,7 +101,7 @@ IpNodeFactory::configureJson(IpCore& ip, json_t* json_ip)
 }
 
 std::pair<std::string, std::string>
-IpNode::getLoopbackPorts() const
+Node::getLoopbackPorts() const
 {
 	for (auto& [masterName, masterVertex] : portsMaster) {
 		for (auto& [slaveName, slaveVertex] : portsSlave) {
@@ -115,7 +115,7 @@ IpNode::getLoopbackPorts() const
 	return { "", "" };
 }
 
-bool IpNode::connect(const StreamVertex& from, const StreamVertex& to)
+bool Node::connect(const StreamVertex& from, const StreamVertex& to)
 {
 	if (from.nodeName != getInstanceName()) {
 		logger->error("Cannot connect from a foreign StreamVertex: {}", from);
@@ -158,7 +158,7 @@ bool IpNode::connect(const StreamVertex& from, const StreamVertex& to)
 		nextHopNode = secondHopNode;
 	}
 
-	auto nextHopNodeIp = std::dynamic_pointer_cast<IpNode>
+	auto nextHopNodeIp = std::dynamic_pointer_cast<Node>
 	                     (card->lookupIp(nextHopNode->nodeName));
 
 	if (nextHopNodeIp == nullptr) {
@@ -171,28 +171,28 @@ bool IpNode::connect(const StreamVertex& from, const StreamVertex& to)
 }
 
 const StreamVertex&
-IpNode::getDefaultSlavePort() const
+Node::getDefaultSlavePort() const
 {
 	logger->error("No default slave port available");
 	throw std::exception();
 }
 
 const StreamVertex&
-IpNode::getDefaultMasterPort() const
+Node::getDefaultMasterPort() const
 {
 	logger->error("No default master port available");
 	throw std::exception();
 }
 
 bool
-IpNode::loopbackPossible() const
+Node::loopbackPossible() const
 {
 	auto ports = getLoopbackPorts();
 	return (not ports.first.empty()) and (not ports.second.empty());
 }
 
 bool
-IpNode::connectInternal(const std::string& slavePort,
+Node::connectInternal(const std::string& slavePort,
                         const std::string& masterPort)
 {
 	(void) slavePort;
@@ -203,7 +203,7 @@ IpNode::connectInternal(const std::string& slavePort,
 }
 
 bool
-IpNode::connectLoopback()
+Node::connectLoopback()
 {
 	auto ports = getLoopbackPorts();
 	const auto& portMaster = portsMaster[ports.first];

fpga/src/villas-fpga-pipe.cpp

@@ -34,7 +34,7 @@
 #include <villas/utils.hpp>
 #include <villas/utils.hpp>
 
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/vlnv.hpp>
 #include <villas/fpga/ips/dma.hpp>

fpga/tests/dma.cpp

@@ -105,5 +105,5 @@ Test(fpga, dma, .description = "DMA")
 	cr_assert(count > 0, "No DMA found");
 
 	MemoryManager::get().getGraph().dump();
-	fpga::ip::IpNode::getGraph().dump();
+	fpga::ip::Node::getGraph().dump();
 }

fpga/tests/fpga.cpp

@@ -23,7 +23,7 @@
 #include <criterion/criterion.h>
 
 #include <villas/utils.hpp>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/vlnv.hpp>
 

fpga/tests/hls.c

@@ -26,7 +26,7 @@
 
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/vlnv.hpp>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 extern struct fpga_card *card;
 

fpga/tests/intc.c

@@ -23,7 +23,7 @@
 #include <criterion/criterion.h>
 
 #include <villas/fpga/card.hpp>
-#include <villas/fpga/ip.hpp>
+#include <villas/fpga/core.hpp>
 
 #include <villas/fpga/ips/intc.hpp>