Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity

change core to use base class card over pcieclass

Browse source 
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
This commit is contained in:
Pascal Henry Bauer 2023-01-20 21:55:35 +01:00
parent ae944b6ce3
commit 7534086e08
2 changed files with 4 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
fpga/include/villas/fpga/core.hpp
View file

@ -26,7 +26,7 @@ namespace villas {
namespace fpga {
// Forward declarations
class PCIeCard;
class Card;
namespace ip {
@ -242,7 +242,7 @@ protected:
Logger logger;
// FPGA card this IP is instantiated on (populated by FpgaIpFactory)
PCIeCard* card;
Card* card;
// Identifier of this IP with its instance name and VLNV
IpIdentifier id;
@ -266,7 +266,7 @@ public:
// Returns a running and checked FPGA IP
static
std::list<std::shared_ptr<Core>> make(PCIeCard* card, json_t *json_ips);
std::list<std::shared_ptr<Core>> make(Card* card, json_t *json_ips);
virtual
std::string getType() const

2
fpga/lib/core.cpp
View file

@ -35,7 +35,7 @@ vlnvInitializationOrder = {
Vlnv("xilinx.com:ip:axis_switch:"),
};
std::list<std::shared_ptr<Core>> CoreFactory::make(PCIeCard* card, json_t *json_ips)
std::list<std::shared_ptr<Core>> CoreFactory::make(Card* card, json_t *json_ips)
{
// We only have this logger until we know the factory to build an IP with
auto loggerStatic = getStaticLogger();