mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
lib/card: copy C->C++ and just make it compile
This commit is contained in:
daniel-k
parent
68c9f08457
commit
7d883089c2
7 changed files with 459 additions and 0 deletions
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@ -35,6 +35,10 @@
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#include "kernel/pci.h"
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#include "kernel/vfio.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Forward declarations */
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struct fpga_ip;
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struct vfio_container;
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@ -92,4 +96,8 @@ void fpga_card_dump(struct fpga_card *c);
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/** Reset the FPGA to a known state */
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int fpga_card_reset(struct fpga_card *c);
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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102
fpga/include/villas/fpga/card.hpp
Normal file
102
fpga/include/villas/fpga/card.hpp
Normal file
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@ -0,0 +1,102 @@
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/** FPGA card
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*
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* This class represents a FPGA device.
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @author Daniel Krebs <github@daniel-krebs.net>
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* @copyright 2017, Institute for Automation of Complex Power Systems, EONERC
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* @license GNU General Public License (version 3)
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*
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* VILLASfpga
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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/** @addtogroup fpga VILLASfpga
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* @{
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*/
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#pragma once
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#include <jansson.h>
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#include "common.h"
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#include "kernel/pci.h"
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#include "kernel/vfio.h"
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#include "plugin.hpp"
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namespace villas {
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/* Forward declarations */
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struct fpga_ip;
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struct vfio_container;
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struct fpga_card {
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char *name; /**< The name of the FPGA card */
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enum state state; /**< The state of this FPGA card. */
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struct pci *pci;
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struct pci_device filter; /**< Filter for PCI device. */
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struct vfio_container *vfio_container;
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struct vfio_device vfio_device; /**< VFIO device handle. */
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int do_reset; /**< Reset VILLASfpga during startup? */
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int affinity; /**< Affinity for MSI interrupts */
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struct list ips; /**< List of IP components on FPGA. */
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char *map; /**< PCI BAR0 mapping for register access */
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size_t maplen;
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size_t dmalen;
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/* Some IP cores are special and referenced here */
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struct fpga_ip *intc;
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struct fpga_ip *reset;
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struct fpga_ip *sw;
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};
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/** Initialize FPGA card and its IP components. */
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int fpga_card_init(struct fpga_card *c, struct pci *pci, struct vfio_container *vc);
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/** Parse configuration of FPGA card including IP cores from config. */
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int fpga_card_parse(struct fpga_card *c, json_t *cfg, const char *name);
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int fpga_card_parse_list(struct list *l, json_t *cfg);
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/** Check if the FPGA card configuration is plausible. */
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int fpga_card_check(struct fpga_card *c);
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/** Start FPGA card. */
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int fpga_card_start(struct fpga_card *c);
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/** Stop FPGA card. */
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int fpga_card_stop(struct fpga_card *c);
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/** Destroy FPGA card. */
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int fpga_card_destroy(struct fpga_card *c);
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/** Dump details of FPGA card to stdout. */
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void fpga_card_dump(struct fpga_card *c);
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/** Reset the FPGA to a known state */
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int fpga_card_reset(struct fpga_card *c);
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} // namespace villas
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/** @} */
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@ -14,6 +14,10 @@
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#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
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#define PCI_FUNC(devfn) ((devfn) & 0x07)
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct pci_device {
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struct {
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int vendor;
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@ -59,4 +63,8 @@ int pci_attach_driver(struct pci_device *d, const char *driver);
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/** Return the IOMMU group of this PCI device or -1 if the device is not in a group. */
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int pci_get_iommu_group(struct pci_device *d);
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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@ -45,6 +45,10 @@ __attribute__((destructor(105))) static void UNIQUE(__dtor)() { \
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#define list_first(list) list_at(list, 0)
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#define list_last(list) list_at(list, (list)->length-1)
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Callback to destroy list elements.
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*
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* @param data A pointer to the data which should be freed.
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@ -110,3 +114,7 @@ void list_sort(struct list *l, cmp_cb_t cmp);
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/** Set single element in list */
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int list_set(struct list *l, int index, void *value);
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#ifdef __cplusplus
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}
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#endif
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@ -32,6 +32,10 @@
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#include "log.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __GNUC__
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#define LIKELY(x) __builtin_expect((x),1)
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#define UNLIKELY(x) __builtin_expect((x),0)
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@ -274,3 +278,7 @@ pid_t spawn(const char *name, char *const argv[]);
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/** Determines the string length as printed on the screen (ignores escable sequences). */
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size_t strlenp(const char *str);
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#ifdef __cplusplus
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}
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#endif
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@ -4,6 +4,7 @@ set(SOURCES
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vlnv.cpp
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vlnv.c
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card.c
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card.cpp
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ips/timer.c
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ips/model.c
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324
fpga/lib/card.cpp
Normal file
324
fpga/lib/card.cpp
Normal file
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@ -0,0 +1,324 @@
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/** FPGA card.
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*
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2017, Institute for Automation of Complex Power Systems, EONERC
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* @license GNU General Public License (version 3)
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*
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* VILLASfpga
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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#include <unistd.h>
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#include <string.h>
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#include "config.h"
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#include "log.h"
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#include "log_config.h"
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#include "list.h"
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#include "utils.h"
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#include "kernel/pci.h"
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#include "kernel/vfio.h"
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#include "fpga/ip.h"
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#include "fpga/card.h"
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namespace villas {
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int fpga_card_init(struct fpga_card *c, struct pci *pci, struct vfio_container *vc)
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{
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assert(c->state == STATE_DESTROYED);
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c->vfio_container = vc;
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c->pci = pci;
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list_init(&c->ips);
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/* Default values */
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c->filter.id.vendor = FPGA_PCI_VID_XILINX;
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c->filter.id.device = FPGA_PCI_PID_VFPGA;
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c->affinity = 0;
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c->do_reset = 0;
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c->state = STATE_INITIALIZED;
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return 0;
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}
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int fpga_card_parse(struct fpga_card *c, json_t *cfg, const char *name)
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{
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int ret;
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json_t *json_ips;
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json_t *json_slot = NULL;
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json_t *json_id = NULL;
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json_error_t err;
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c->name = strdup(name);
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ret = json_unpack_ex(cfg, &err, 0, "{ s?: i, s?: b, s?: o, s?: o, s: o }",
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"affinity", &c->affinity,
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"do_reset", &c->do_reset,
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"slot", &json_slot,
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"id", &json_id,
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"ips", &json_ips
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);
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if (ret)
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jerror(&err, "Failed to parse FPGA vard configuration");
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if (json_slot) {
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const char *err, *slot;
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slot = json_string_value(json_slot);
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if (slot) {
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ret = pci_device_parse_slot(&c->filter, slot, &err);
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if (ret)
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error("Failed to parse PCI slot: %s", err);
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}
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else
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error("PCI slot must be a string");
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}
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if (json_id) {
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const char *err, *id;
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id = json_string_value(json_id);
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if (id) {
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ret = pci_device_parse_id(&c->filter, (char*) id, &err);
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if (ret)
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error("Failed to parse PCI id: %s", err);
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}
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else
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error("PCI ID must be a string");
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}
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if (!json_is_object(json_ips))
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error("FPGA card IPs section must be an object");
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const char *name_ip;
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json_t *json_ip;
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json_object_foreach(json_ips, name_ip, json_ip) {
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const char *vlnv;
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struct fpga_ip_type *vt;
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struct fpga_ip *ip = (struct fpga_ip *) alloc(sizeof(struct fpga_ip));
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ip->card = c;
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ret = json_unpack_ex(json_ip, &err, 0, "{ s: s }", "vlnv", &vlnv);
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if (ret)
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error("Failed to parse FPGA IP '%s' of card '%s'", name_ip, name);
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vt = fpga_ip_type_lookup(vlnv);
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if (!vt)
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error("FPGA IP core VLNV identifier '%s' is invalid", vlnv);
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ret = fpga_ip_init(ip, vt);
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if (ret)
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error("Failed to initalize FPGA IP core");
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ret = fpga_ip_parse(ip, json_ip, name_ip);
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if (ret)
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error("Failed to parse FPGA IP core");
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list_push(&c->ips, ip);
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}
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c->state = STATE_PARSED;
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return 0;
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}
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int fpga_card_parse_list(struct list *cards, json_t *cfg)
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{
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int ret;
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if (!json_is_object(cfg))
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error("FPGA card configuration section must be a JSON object");
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const char *name;
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json_t *json_fpga;
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json_object_foreach(cfg, name, json_fpga) {
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struct fpga_card *c = (struct fpga_card *) alloc(sizeof(struct fpga_card));
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ret = ::fpga_card_parse(c, json_fpga, name);
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if (ret)
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error("Failed to parse FPGA card configuration");
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list_push(cards, c);
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}
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return 0;
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}
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int fpga_card_start(struct fpga_card *c)
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{
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int ret;
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struct pci_device *pdev;
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assert(c->state == STATE_INITIALIZED);
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/* Search for FPGA card */
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pdev = pci_lookup_device(c->pci, &c->filter);
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if (!pdev)
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error("Failed to find PCI device");
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/* Attach PCIe card to VFIO container */
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ret = vfio_pci_attach(&c->vfio_device, c->vfio_container, pdev);
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if (ret)
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error("Failed to attach VFIO device");
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/* Map PCIe BAR */
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c->map = (char*) vfio_map_region(&c->vfio_device, VFIO_PCI_BAR0_REGION_INDEX);
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if (c->map == MAP_FAILED)
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serror("Failed to mmap() BAR0");
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/* Enable memory access and PCI bus mastering for DMA */
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ret = vfio_pci_enable(&c->vfio_device);
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if (ret)
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serror("Failed to enable PCI device");
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/* Reset system? */
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if (c->do_reset) {
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/* Reset / detect PCI device */
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ret = vfio_pci_reset(&c->vfio_device);
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if (ret)
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serror("Failed to reset PCI device");
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ret = fpga_card_reset(c);
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if (ret)
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error("Failed to reset FGPA card");
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}
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/* Initialize IP cores */
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for (size_t j = 0; j < list_length(&c->ips); j++) {
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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ret = fpga_ip_start(i);
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if (ret)
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error("Failed to initalize FPGA IP core: %s (%u)", i->name, ret);
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}
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c->state = STATE_STARTED;
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return 0;
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}
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int fpga_card_stop(struct fpga_card *c)
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{
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int ret;
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assert(c->state == STATE_STOPPED);
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for (size_t j = 0; j < list_length(&c->ips); j++) {
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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ret = fpga_ip_stop(i);
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if (ret)
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error("Failed to stop FPGA IP core: %s (%u)", i->name, ret);
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}
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c->state = STATE_STOPPED;
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return 0;
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}
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void fpga_card_dump(struct fpga_card *c)
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{
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info("VILLASfpga card:");
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{ INDENT
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info("Slot: %04x:%02x:%02x.%d", c->vfio_device.pci_device->slot.domain, c->vfio_device.pci_device->slot.bus, c->vfio_device.pci_device->slot.device, c->vfio_device.pci_device->slot.function);
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info("Vendor ID: %04x", c->vfio_device.pci_device->id.vendor);
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info("Device ID: %04x", c->vfio_device.pci_device->id.device);
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info("Class ID: %04x", c->vfio_device.pci_device->id.class_code);
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info("BAR0 mapped at %p", c->map);
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info("IP blocks:");
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for (size_t j = 0; j < list_length(&c->ips); j++) { INDENT
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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fpga_ip_dump(i);
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}
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}
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vfio_dump(c->vfio_device.group->container);
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}
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int fpga_card_check(struct fpga_card *c)
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{
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assert(c->state == STATE_PARSED);
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/* Check FPGA configuration */
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struct fpga_vlnv vlnv_reset = { "xilinx.com", "ip", "axi_gpio", NULL };
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c->reset = fpga_vlnv_lookup(&c->ips, &vlnv_reset);
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if (!c->reset)
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error("FPGA is missing a reset controller");
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struct fpga_vlnv vlnv_intc = { "acs.eonerc.rwth-aachen.de", "user", "axi_pcie_intc", NULL };
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c->intc = fpga_vlnv_lookup(&c->ips, &vlnv_intc);
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if (!c->intc)
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error("FPGA is missing a interrupt controller");
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struct fpga_vlnv vlnv_sw = { "xilinx.com", "ip", "axis_interconnect", NULL };
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c->sw = fpga_vlnv_lookup(&c->ips, &vlnv_sw);
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if (!c->sw)
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warn("FPGA is missing an AXI4-Stream switch");
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return 0;
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}
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int fpga_card_destroy(struct fpga_card *c)
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{
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list_destroy(&c->ips, (dtor_cb_t) fpga_ip_destroy, true);
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|
||||
return 0;
|
||||
}
|
||||
|
||||
int fpga_card_reset(struct fpga_card *c)
|
||||
{
|
||||
int ret;
|
||||
char state[4096];
|
||||
|
||||
/* Save current state of PCI configuration space */
|
||||
ret = pread(c->vfio_device.fd, state, sizeof(state), (off_t) VFIO_PCI_CONFIG_REGION_INDEX << 40);
|
||||
if (ret != sizeof(state))
|
||||
return -1;
|
||||
|
||||
uint32_t *rst_reg = (uint32_t *) (c->map + c->reset->baseaddr);
|
||||
|
||||
debug(3, "FPGA: reset");
|
||||
rst_reg[0] = 1;
|
||||
|
||||
usleep(100000);
|
||||
|
||||
/* Restore previous state of PCI configuration space */
|
||||
ret = pwrite(c->vfio_device.fd, state, sizeof(state), (off_t) VFIO_PCI_CONFIG_REGION_INDEX << 40);
|
||||
if (ret != sizeof(state))
|
||||
return -1;
|
||||
|
||||
/* After reset the value should be zero again */
|
||||
if (rst_reg[0])
|
||||
return -2;
|
||||
|
||||
c->state = STATE_INITIALIZED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
} // namespace villas
|
||||
Loading…
Add table
Reference in a new issue