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refactor: move single vfio device requirement to pciecard.
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
This commit is contained in:
parent
3bcf5576e9
commit
7f7920876e
6 changed files with 17 additions and 7 deletions
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@ -25,7 +25,6 @@ public:
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std::string name; // The name of the FPGA card
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std::shared_ptr<kernel::vfio::Container> vfioContainer;
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std::shared_ptr<kernel::vfio::Device> vfioDevice;
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// Slave address space ID to access the PCIe address space from the
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// FPGA
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@ -11,6 +11,7 @@
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#include <xilinx/xintc.h>
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#include <villas/fpga/core.hpp>
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#include <villas/kernel/vfio_device.hpp>
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namespace villas {
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namespace fpga {
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@ -40,6 +41,8 @@ public:
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private:
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static constexpr char registerMemory[] = "reg0";
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std::shared_ptr<villas::kernel::vfio::Device> vfioDevice = nullptr;
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std::list<MemoryBlockName> getMemoryBlocks() const {
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return {registerMemory};
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}
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@ -56,6 +56,7 @@ public: // TODO: make this private
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int affinity; // Affinity for MSI interrupts
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std::shared_ptr<kernel::devices::PciDevice> pdev; // PCI device handle
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std::shared_ptr<kernel::vfio::Device> vfioDevice;
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protected:
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Logger getLogger() const { return villas::Log::get(name); }
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@ -22,17 +22,20 @@ using namespace villas::fpga::ip;
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InterruptController::~InterruptController() {}
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bool InterruptController::stop() {
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return card->vfioDevice->pciMsiDeinit(this->efds) > 0;
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return this->vfioDevice->pciMsiDeinit(this->efds) > 0;
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}
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bool InterruptController::init() {
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const uintptr_t base = getBaseAddr(registerMemory);
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num_irqs = card->vfioDevice->pciMsiInit(efds);
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PCIeCard *pciecard = dynamic_cast<PCIeCard *>(card);
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this->vfioDevice = pciecard->vfioDevice;
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num_irqs = this->vfioDevice->pciMsiInit(efds);
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if (num_irqs < 0)
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return false;
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if (not card->vfioDevice->pciMsiFind(nos)) {
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if (not this->vfioDevice->pciMsiFind(nos)) {
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return false;
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}
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@ -24,9 +24,11 @@ bool AxiPciExpressBridge::init() {
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// address space we can use for translation -> error
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card->addrSpaceIdHostToDevice = busMasterInterfaces.at(getAxiInterfaceName());
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PCIeCard *pciecard = dynamic_cast<PCIeCard *>(card);
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// Map PCIe BAR0 via VFIO
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const void *bar0_mapped =
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card->vfioDevice->regionMap(VFIO_PCI_BAR0_REGION_INDEX);
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pciecard->vfioDevice->regionMap(VFIO_PCI_BAR0_REGION_INDEX);
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if (bar0_mapped == MAP_FAILED) {
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logger->error("Failed to mmap() BAR0");
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return false;
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@ -34,7 +36,7 @@ bool AxiPciExpressBridge::init() {
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// Determine size of BAR0 region
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const size_t bar0_size =
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card->vfioDevice->regionGetSize(VFIO_PCI_BAR0_REGION_INDEX);
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pciecard->vfioDevice->regionGetSize(VFIO_PCI_BAR0_REGION_INDEX);
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// Create a mapping from process address space to the FPGA card via vfio
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mm.createMapping(reinterpret_cast<uintptr_t>(bar0_mapped), 0, bar0_size,
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@ -23,6 +23,7 @@
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#include <villas/fpga/ips/dino.hpp>
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#include <villas/fpga/ips/register.hpp>
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#include <villas/fpga/ips/switch.hpp>
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#include <villas/fpga/pcie_card.hpp>
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#include <villas/fpga/utils.hpp>
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using namespace villas;
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@ -367,7 +368,8 @@ int FpgaNode::slowWrite(Sample *smps[], unsigned cnt) {
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std::vector<int> FpgaNode::getPollFDs() {
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if (!lowLatencyMode && card && !card->polling) {
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return card->vfioDevice->getEventfdList();
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std::shared_ptr<PCIeCard> pciecard = std::dynamic_pointer_cast<PCIeCard>(card);
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return pciecard->vfioDevice->getEventfdList();
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} else {
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return {};
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}
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