mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
reworked interrupt handling
This commit is contained in:
parent
545ef6fa14
commit
87bd0c3b8c
4 changed files with 215 additions and 202 deletions
100
lib/fpga/intc.c
100
lib/fpga/intc.c
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@ -7,32 +7,44 @@
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**********************************************************************************/
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#include <unistd.h>
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#include "config.h"
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#include "log.h"
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#include "nodes/fpga.h"
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#include "kernel/vfio.h"
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#include "kernel/kernel.h"
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#include "fpga/ip.h"
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#include "fpga/intc.h"
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int intc_init(struct ip *c)
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{
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struct fpga *f = c->card;
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int ret;
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struct fpga *f = c->card;
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struct intc *intc = &c->intc;
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uintptr_t base = (uintptr_t) f->map + c->baseaddr;
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if (c != f->intc)
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error("There can be only one interrupt controller per FPGA");
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uintptr_t base = (uintptr_t) f->map + c->baseaddr;
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intc->num_irqs = vfio_pci_msi_init(&f->vd, intc->efds);
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if (intc->num_irqs < 0)
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return -1;
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ret = vfio_pci_msi_find(&f->vd, intc->nos);
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if (ret)
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return -2;
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/* For each IRQ */
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for (int i = 0; i < intc->num_irqs; i++) {
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/* Pin to core */
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ret = kernel_irq_setaffinity(intc->nos[i], DEFAULT_AFFINITY, NULL);
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if (ret)
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serror("Failed to change affinity of VFIO-MSI interrupt");
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/* Setup IRQs */
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for (int i = 0; i < f->vd.irqs[VFIO_PCI_MSI_IRQ_INDEX].count; i++) {
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/* Setup vector */
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XIntc_Out32(base + XIN_IVAR_OFFSET + i * 4, i);
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/* Register eventfd with VFIO */
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ret = vfio_pci_msi_fd(&f->vd, (1 << i));
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if (ret < 0)
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serror("Failed to create eventfd for IRQ: ret=%d", f->vd.msi_efds[i]);
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}
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XIntc_Out32(base + XIN_IMR_OFFSET, 0); /* Use manual acknowlegement for all IRQs */
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@ -46,9 +58,18 @@ int intc_init(struct ip *c)
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return 0;
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}
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int intc_enable(struct ip *c, uint32_t mask, int poll)
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void intc_destroy(struct ip *c)
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{
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struct fpga *f = c->card;
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struct intc *intc = &c->intc;
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vfio_pci_msi_deinit(&f->vd, intc->efds);
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}
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int intc_enable(struct ip *c, uint32_t mask, int flags)
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{
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struct intc *intc = &c->intc;
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struct fpga *f = c->card;
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uint32_t ier, imr;
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uintptr_t base = (uintptr_t) f->map + c->baseaddr;
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@ -60,12 +81,25 @@ int intc_enable(struct ip *c, uint32_t mask, int poll)
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/* Clear pending IRQs */
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XIntc_Out32(base + XIN_IAR_OFFSET, mask);
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if (poll)
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XIntc_Out32(base + XIN_IMR_OFFSET, imr & ~mask);
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else
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XIntc_Out32(base + XIN_IER_OFFSET, ier | mask);
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for (int i = 0; i < intc->num_irqs; i++) {
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if (mask & (1 << i))
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intc->flags[i] = flags;
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}
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debug(8, "FPGA: Interupt enabled: %#x", mask);
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if (flags & INTC_POLLING) {
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XIntc_Out32(base + XIN_IMR_OFFSET, imr & ~mask);
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XIntc_Out32(base + XIN_IER_OFFSET, ier & ~mask);
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}
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else {
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XIntc_Out32(base + XIN_IER_OFFSET, ier | mask);
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XIntc_Out32(base + XIN_IMR_OFFSET, imr | mask);
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}
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debug(3, "New ier = %#x", XIntc_In32(base + XIN_IER_OFFSET));
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debug(3, "New imr = %#x", XIntc_In32(base + XIN_IMR_OFFSET));
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debug(3, "New isr = %#x", XIntc_In32(base + XIN_ISR_OFFSET));
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debug(8, "FPGA: Interupt enabled: mask=%#x flags=%#x", mask, flags);
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return 0;
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}
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@ -75,44 +109,46 @@ int intc_disable(struct ip *c, uint32_t mask)
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struct fpga *f = c->card;
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uintptr_t base = (uintptr_t) f->map + c->baseaddr;
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uint32_t ier = XIntc_In32(base + XIN_IER_OFFSET);
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XIntc_Out32(base + XIN_IER_OFFSET, XIntc_In32(base + XIN_IER_OFFSET) & ~mask);
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XIntc_Out32(base + XIN_IER_OFFSET, ier & ~mask);
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return 0;
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}
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uint64_t intc_wait(struct ip *c, int irq, int poll)
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uint64_t intc_wait(struct ip *c, int irq)
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{
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struct intc *intc = &c->intc;
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struct fpga *f = c->card;
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uintptr_t base = (uintptr_t) f->map + c->baseaddr;
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uint64_t cnt;
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if (poll) {
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uint32_t mask = 1 << irq;
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uint32_t isr;
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do { /* Wait for IRQ to occur */
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if (intc->flags[irq] & INTC_POLLING) {
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uint32_t isr, mask = 1 << irq;
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do {
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isr = XIntc_In32(base + XIN_ISR_OFFSET);
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} while (!(isr & mask));
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pthread_testcancel();
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} while ((isr & mask) != mask);
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/* Acknowlege */
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XIntc_Out32(base + XIN_IAR_OFFSET, mask);
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cnt = 1;
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return 1;
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}
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else {
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ssize_t ret = read(f->vd.msi_efds[irq], &cnt, sizeof(cnt));
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uint64_t cnt;
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ssize_t ret = read(intc->efds[irq], &cnt, sizeof(cnt));
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if (ret != sizeof(cnt))
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return 0;
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return cnt;
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}
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return cnt;
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}
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static struct ip_type ip = {
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.vlnv = { "acs.eonerc.rwth-aachen.de", "user", "axi_pcie_intc", NULL },
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.init = intc_init
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.init = intc_init,
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.destroy = intc_destroy
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};
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REGISTER_IP_TYPE(&ip)
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@ -17,14 +17,6 @@ int rt_init(int affinity, int priority)
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char isolcpus[255];
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int is_isol, is_rt, ret;
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/* Pin interrupts to our core */
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/* for (int i = 0; i < fpga->vd.irqs[VFIO_PCI_MSI_IRQ_INDEX].count; i++) {
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ret = kernel_irq_setaffinity(fpga->vd.msi_irqs[i], AFFINITY, NULL);
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if (ret)
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serror("Failed to change affinity of VFIO-MSI interrupt");
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}
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*/
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/* Use FIFO scheduler with real time priority */
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is_rt = kernel_is_rt();
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if (is_rt)
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@ -16,10 +16,8 @@
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <sys/eventfd.h>
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#include "utils.h"
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#include "log.h"
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@ -29,6 +27,8 @@
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#include "kernel/vfio.h"
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#include "kernel/pci.h"
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#include "fpga/dma.h"
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static const char *vfio_pci_region_names[] = {
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"PCI_BAR0", // VFIO_PCI_BAR0_REGION_INDEX,
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"PCI_BAR1", // VFIO_PCI_BAR1_REGION_INDEX,
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@ -117,14 +117,6 @@ void vfio_dev_destroy(struct vfio_dev *d)
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for (int i = 0; i < d->info.num_regions; i++)
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vfio_unmap_region(d, i);
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/* Check if this is really a vfio-pci device */
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if (d->info.flags & VFIO_DEVICE_FLAGS_PCI) {
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for (int i = 0; i < d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count; i++)
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close(d->msi_efds[i]);
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free(d->msi_efds);
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}
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ret = close(d->fd);
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if (ret)
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return;
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@ -247,14 +239,6 @@ int vfio_pci_attach(struct vfio_dev *d, struct vfio_container *c, struct pci_dev
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d->pdev = pdev;
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/* Initialize MSI irqs */
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d->msi_efds = alloc(sizeof(int) * d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count);
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d->msi_irqs = alloc(sizeof(int) * d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count);
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for (int i = 0; i < d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count; i++) {
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d->msi_efds[i] = -1;
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d->msi_irqs[i] = -1;
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}
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return 0;
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}
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@ -368,24 +352,25 @@ int vfio_pci_reset(struct vfio_dev *d)
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return ret;
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}
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int vfio_pci_msi_findirqs(struct vfio_dev *d)
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int vfio_pci_msi_find(struct vfio_dev *d, int nos[32])
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{
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int ret, idx, irq;
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char *end, *col, *last, line[1024], name[13];
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FILE *f;
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char *end, *col, *last, line[1024];
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int ret, vector;
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f = fopen("/proc/interrupts", "r");
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if (!f)
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return -1;
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/* Ignore header line */
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fgets(line, sizeof(line), f);
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for (int i = 0; i < 32; i++)
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nos[i] = -1;
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/* For each line in /proc/interruipts */
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while (fgets(line, sizeof(line), f)) {
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col = strtok(line, " ");
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/* IRQ number is in first column */
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int irq = strtol(col, &end, 10);
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irq = strtol(col, &end, 10);
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if (col == end)
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continue;
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@ -393,79 +378,85 @@ int vfio_pci_msi_findirqs(struct vfio_dev *d)
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while ((col = strtok(NULL, " ")))
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last = col;
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char name[13];
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ret = sscanf(last, "vfio-msi[%u](%12[0-9:])", &vector, name);
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if (ret == 2) { /* match was successful */
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if (strstr(d->name, name) == d->name) /* device matches */
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d->msi_irqs[vector] = irq;
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ret = sscanf(last, "vfio-msi[%u](%12[0-9:])", &idx, name);
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if (ret == 2) {
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if (strstr(d->name, name) == d->name)
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nos[idx] = irq;
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}
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}
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fclose(f);
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return 0;
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}
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int vfio_pci_msi_fd(struct vfio_dev *d, uint32_t mask)
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int vfio_pci_msi_deinit(struct vfio_dev *d, int efds[32])
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{
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int efd, ret;
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struct vfio_irq_info *msi_irqs = &d->irqs[VFIO_PCI_MSI_IRQ_INDEX];
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int ret, irq_setlen, irq_count = d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count;
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struct vfio_irq_set *irq_set;
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size_t irq_setlen;
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/* Check if this is really a vfio-pci device */
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if (!(d->info.flags & VFIO_DEVICE_FLAGS_PCI))
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return -1;
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/* Check if already assigned */
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for (int i = 0; i < MIN(sizeof(mask) * 8, msi_irqs->count); i++) {
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if ((mask & (1 << i)) && (d->msi_efds[i] >= 0))
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return -1;
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}
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/* Create new eventfd */
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efd = eventfd(0, 0);
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if (efd < 0)
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return -3;
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/* Assign new efd */
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for (int i = 0; i < MIN(sizeof(mask) * 8, msi_irqs->count); i++) {
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if (mask & (1 << i))
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d->msi_efds[i] = efd;
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}
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irq_setlen = sizeof(struct vfio_irq_set) + msi_irqs->count * (sizeof(d->msi_efds[0]));
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irq_setlen = sizeof(struct vfio_irq_set) + sizeof(int) * irq_count;
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irq_set = alloc(irq_setlen);
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irq_set->argsz = irq_setlen;
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irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
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irq_set->index = VFIO_PCI_MSI_IRQ_INDEX;
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irq_set->count = msi_irqs->count;
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irq_set->count = irq_count;
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irq_set->start = 0;
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/* We need to disable the complete MSI index first before adding new ones */
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if (msi_irqs->flags & VFIO_IRQ_INFO_NORESIZE) {
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memset(&irq_set->data[0], 0xFF, msi_irqs->count * sizeof(d->msi_efds[0]));
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ret = ioctl(d->fd, VFIO_DEVICE_SET_IRQS, irq_set);
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if (ret)
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return -4;
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for (int i = 0; i < irq_count; i++) {
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close(efds[i]);
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efds[i] = -1;
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}
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memcpy(&irq_set->data[0], d->msi_efds, msi_irqs->count * sizeof(d->msi_efds[0]));
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memcpy(irq_set->data, efds, sizeof(int) * irq_count);
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ret = ioctl(d->fd, VFIO_DEVICE_SET_IRQS, irq_set);
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if (ret)
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return -4;
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/* Find corresponding Linux IRQ numbers */
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ret = vfio_pci_msi_findirqs(d);
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free(irq_set);
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return irq_count;
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}
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int vfio_pci_msi_init(struct vfio_dev *d, int efds[32])
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{
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int ret, irq_setlen, irq_count = d->irqs[VFIO_PCI_MSI_IRQ_INDEX].count;
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struct vfio_irq_set *irq_set;
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/* Check if this is really a vfio-pci device */
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if (!(d->info.flags & VFIO_DEVICE_FLAGS_PCI))
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return -1;
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irq_setlen = sizeof(struct vfio_irq_set) + sizeof(int) * irq_count;
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irq_set = alloc(irq_setlen);
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irq_set->argsz = irq_setlen;
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irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
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irq_set->index = VFIO_PCI_MSI_IRQ_INDEX;
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irq_set->start = 0;
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irq_set->count = irq_count;
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/* Now set the new eventfds */
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for (int i = 0; i < irq_count; i++) {
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efds[i] = eventfd(0, 0);
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if (efds[i] < 0)
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return -3;
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}
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memcpy(irq_set->data, efds, sizeof(int) * irq_count);
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ret = ioctl(d->fd, VFIO_DEVICE_SET_IRQS, irq_set);
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if (ret)
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return -5;
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return -4;
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free(irq_set);
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return efd;
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return irq_count;
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}
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int vfio_pci_enable(struct vfio_dev *d)
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@ -556,33 +547,44 @@ void * vfio_map_region(struct vfio_dev *d, int idx)
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return d->mappings[idx];
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}
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void * vfio_map_dma(struct vfio_container *c, size_t size, size_t pgsize, uint64_t phyaddr)
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int vfio_unmap_region(struct vfio_dev *d, int idx)
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{
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void *vaddr;
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int ret, pgbits, flags;
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size_t defpgsize;
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defpgsize = sysconf(_SC_PAGESIZE);
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if (!pgsize)
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pgsize = defpgsize;
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pgbits = 8 * sizeof(unsigned long long) - __builtin_clzll((unsigned long long) pgsize) - 1;
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flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_32BIT;
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if (pgsize != defpgsize) /* Map as Hugepages */
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flags |= MAP_HUGETLB | (pgbits << MAP_HUGE_SHIFT);
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vaddr = mmap(0, size, PROT_READ | PROT_WRITE, flags, 0, 0);
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if (vaddr == MAP_FAILED)
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return MAP_FAILED;
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debug(3, "Allocated VM for DMA mapping at: %p", vaddr);
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int ret;
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struct vfio_region_info *r = &d->regions[idx];
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if (!d->mappings[idx])
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return -1; /* was not mapped */
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debug(3, "VFIO: unmap region %u from device", idx);
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ret = munmap(d->mappings[idx], r->size);
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if (ret)
|
||||
return -2;
|
||||
|
||||
d->mappings[idx] = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int vfio_map_dma(struct vfio_container *c, struct dma_mem *mem)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (mem->len & 0xFFF) {
|
||||
mem->len += 0x1000;
|
||||
mem->len &= ~0xFFF;
|
||||
}
|
||||
|
||||
if (mem->base_phys == -1) {
|
||||
mem->base_phys = c->iova_next;
|
||||
c->iova_next += mem->len;
|
||||
}
|
||||
|
||||
struct vfio_iommu_type1_dma_map dma_map = {
|
||||
.argsz = sizeof(struct vfio_iommu_type1_dma_map),
|
||||
.vaddr = (uint64_t) vaddr,
|
||||
.size = size,
|
||||
.iova = phyaddr,
|
||||
.vaddr = (uint64_t) mem->base_virt,
|
||||
.iova = (uint64_t) mem->base_phys,
|
||||
.size = mem->len,
|
||||
.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE
|
||||
};
|
||||
|
||||
|
|
@ -592,31 +594,23 @@ void * vfio_map_dma(struct vfio_container *c, size_t size, size_t pgsize, uint64
|
|||
|
||||
info("DMA map size=%#llx, iova=%#llx, vaddr=%#llx", dma_map.size, dma_map.iova, dma_map.vaddr);
|
||||
|
||||
return vaddr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int vfio_unmap_region(struct vfio_dev *d, int idx)
|
||||
int vfio_unmap_dma(struct vfio_container *c, struct dma_mem *mem)
|
||||
{
|
||||
struct vfio_region_info *r = &d->regions[idx];
|
||||
int ret;
|
||||
|
||||
if (!d->mappings[idx])
|
||||
return -1; /* was not mapped */
|
||||
|
||||
debug(3, "VFIO: unmap region %u from device", idx);
|
||||
|
||||
return munmap(d->mappings[idx], r->size);
|
||||
}
|
||||
|
||||
int vfio_unmap_dma(struct vfio_container *c)
|
||||
{
|
||||
struct vfio_iommu_type1_dma_unmap dma_unmap = {
|
||||
.argsz = sizeof(struct vfio_iommu_type1_dma_unmap),
|
||||
.flags = 0,
|
||||
.iova = 0, /* IO virtual address */
|
||||
.size = 0 /* Size of mapping (bytes) */
|
||||
.iova = (uint64_t) mem->base_phys,
|
||||
.size = mem->len,
|
||||
};
|
||||
|
||||
debug(3, "VFIO: unmap DMA region from device");
|
||||
|
||||
return ioctl(c->fd, VFIO_IOMMU_UNMAP_DMA, &dma_unmap);
|
||||
ret = ioctl(c->fd, VFIO_IOMMU_UNMAP_DMA, &dma_unmap);
|
||||
if (ret)
|
||||
serror("Failed to unmap DMA mapping");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -49,7 +49,11 @@ int fpga_reset(struct fpga *f)
|
|||
if (ret != sizeof(state))
|
||||
return -1;
|
||||
|
||||
return rst_reg[0];
|
||||
/* After reset the value should be zero again */
|
||||
if (rst_reg[0])
|
||||
return -2;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void fpga_dump(struct fpga *f)
|
||||
|
|
@ -71,7 +75,6 @@ void fpga_dump(struct fpga *f)
|
|||
info("Class ID: %04x", fpga.vd.pdev->device_class);
|
||||
|
||||
info("BAR0 mapped at %p", fpga.map);
|
||||
info("DMA mapped at %p", fpga.dma);
|
||||
|
||||
info("IP blocks:");
|
||||
list_foreach(struct ip *i, &f->ips) { INDENT
|
||||
|
|
@ -166,7 +169,7 @@ int fpga_init(int argc, char * argv[], config_setting_t *cfg)
|
|||
ret = fpga_parse_card(f, argc, argv, cfg);
|
||||
if (ret)
|
||||
cerror(cfg, "Failed to parse VILLASfpga config");
|
||||
|
||||
|
||||
/* Check FPGA configuration */
|
||||
f->reset = ip_vlnv_lookup(&f->ips, "xilinx.com", "ip", "axi_gpio", NULL);
|
||||
if (!f->reset)
|
||||
|
|
@ -199,27 +202,22 @@ int fpga_init(int argc, char * argv[], config_setting_t *cfg)
|
|||
f->map = vfio_map_region(&f->vd, VFIO_PCI_BAR0_REGION_INDEX);
|
||||
if (f->map == MAP_FAILED)
|
||||
serror("Failed to mmap() BAR0");
|
||||
|
||||
/* Map DMA accessible memory */
|
||||
f->dma = vfio_map_dma(f->vd.group->container, 16 << 20, 0x1000, 0x0);
|
||||
if (f->dma == MAP_FAILED)
|
||||
serror("Failed to mmap() DMA");
|
||||
|
||||
/* Enable memory access and PCI bus mastering for DMA */
|
||||
ret = vfio_pci_enable(&f->vd);
|
||||
if (ret)
|
||||
serror("Failed to enable PCI device");
|
||||
|
||||
/* Reset system ? */
|
||||
/* Reset system? */
|
||||
if (f->do_reset) {
|
||||
ret = fpga_reset(f);
|
||||
if (ret)
|
||||
error("Failed to reset FGPA card");
|
||||
|
||||
/* Reset / detect PCI device */
|
||||
ret = vfio_pci_reset(&f->vd);
|
||||
if (ret)
|
||||
serror("Failed to reset PCI device");
|
||||
|
||||
ret = fpga_reset(f);
|
||||
if (ret)
|
||||
error("Failed to reset FGPA card");
|
||||
}
|
||||
|
||||
/* Initialize IP cores */
|
||||
|
|
@ -290,6 +288,7 @@ int fpga_get_type(struct ip *c)
|
|||
int fpga_open(struct node *n)
|
||||
{
|
||||
int ret;
|
||||
|
||||
struct fpga_dm *d = n->_vd;
|
||||
struct fpga *f = d->card;
|
||||
|
||||
|
|
@ -301,35 +300,25 @@ int fpga_open(struct node *n)
|
|||
if (d->type < 0)
|
||||
cerror(n->cfg, "IP '%s' is not a supported datamover", d->ip->name);
|
||||
|
||||
switch_init_paths(f->sw);
|
||||
|
||||
int flags = 0;
|
||||
if (!d->use_irqs)
|
||||
flags |= INTC_POLLING;
|
||||
|
||||
switch (d->type) {
|
||||
case FPGA_DM_DMA:
|
||||
XAxiDma_Reset(&d->ip->dma.inst);
|
||||
/* Map DMA accessible memory */
|
||||
ret = dma_alloc(d->ip, &d->dma, 0x1000, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (d->ip->dma.inst.HasSg) {
|
||||
struct ip *bram = ip_vlnv_lookup(&f->ips, "xilinx.com", "ip", "axi_bram_ctrl", NULL);
|
||||
if (!bram)
|
||||
return -3;
|
||||
|
||||
/* Memory for buffer descriptors */
|
||||
struct dma_mem bd = {
|
||||
.base_virt = (uintptr_t) f->map + bram->baseaddr,
|
||||
.base_phys = bram->baseaddr,
|
||||
.len = bram->bram.size
|
||||
};
|
||||
|
||||
ret = dma_init_rings(d->ip, &bd);
|
||||
if (ret)
|
||||
return -4;
|
||||
}
|
||||
|
||||
intc_enable(f->intc, (1 << d->ip->irq), !d->use_irqs); /* MM2S */
|
||||
intc_enable(f->intc, (1 << (d->ip->irq + 1)), !d->use_irqs); /* S2MM */
|
||||
intc_enable(f->intc, (1 << (d->ip->irq )), flags); /* MM2S */
|
||||
intc_enable(f->intc, (1 << (d->ip->irq + 1)), flags); /* S2MM */
|
||||
break;
|
||||
|
||||
case FPGA_DM_FIFO:
|
||||
XLlFifo_Reset(&d->ip->fifo.inst);
|
||||
|
||||
intc_enable(f->intc, (1 << d->ip->irq), !d->use_irqs); /* MM2S & S2MM */
|
||||
intc_enable(f->intc, (1 << d->ip->irq), flags); /* MM2S & S2MM */
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -339,16 +328,20 @@ int fpga_open(struct node *n)
|
|||
|
||||
int fpga_close(struct node *n)
|
||||
{
|
||||
int ret;
|
||||
|
||||
struct fpga_dm *d = n->_vd;
|
||||
struct fpga *f = d->card;
|
||||
|
||||
|
||||
switch (d->type) {
|
||||
case FPGA_DM_DMA:
|
||||
if (d->use_irqs) {
|
||||
intc_disable(f->intc, d->ip->irq); /* MM2S */
|
||||
intc_disable(f->intc, d->ip->irq + 1); /* S2MM */
|
||||
}
|
||||
|
||||
intc_disable(f->intc, d->ip->irq); /* MM2S */
|
||||
intc_disable(f->intc, d->ip->irq + 1); /* S2MM */
|
||||
|
||||
ret = dma_free(d->ip, &d->dma);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
case FPGA_DM_FIFO:
|
||||
if (d->use_irqs)
|
||||
intc_disable(f->intc, d->ip->irq); /* MM2S & S2MM */
|
||||
|
|
@ -359,13 +352,13 @@ int fpga_close(struct node *n)
|
|||
|
||||
int fpga_read(struct node *n, struct sample *smps[], unsigned cnt)
|
||||
{
|
||||
int ret;
|
||||
|
||||
struct fpga_dm *d = n->_vd;
|
||||
struct fpga *f = d->card;
|
||||
struct sample *smp = smps[0];
|
||||
|
||||
int ret;
|
||||
char *tmp = f->dma, *addr = (char *) smp->values;
|
||||
size_t recvlen;
|
||||
|
||||
//size_t len = smp->length * sizeof(smp->values[0]);
|
||||
size_t len = 64 * sizeof(smp->values[0]);
|
||||
|
||||
|
|
@ -376,7 +369,7 @@ int fpga_read(struct node *n, struct sample *smps[], unsigned cnt)
|
|||
/* Read data from RTDS */
|
||||
switch (d->type) {
|
||||
case FPGA_DM_DMA:
|
||||
ret = dma_read(d->ip, tmp, len);
|
||||
ret = dma_read(d->ip, d->dma.base_phys + 0x800, len);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -384,12 +377,12 @@ int fpga_read(struct node *n, struct sample *smps[], unsigned cnt)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
memcpy(addr, tmp, recvlen);
|
||||
memcpy(smp->values, d->dma.base_virt + 0x800, recvlen);
|
||||
|
||||
smp->length = recvlen / 4;
|
||||
return 1;
|
||||
case FPGA_DM_FIFO:
|
||||
recvlen = fifo_read(d->ip, addr, len);
|
||||
recvlen = fifo_read(d->ip, (char *) smp->values, len);
|
||||
|
||||
smp->length = recvlen / 4;
|
||||
return 1;
|
||||
|
|
@ -402,11 +395,8 @@ int fpga_write(struct node *n, struct sample *smps[], unsigned cnt)
|
|||
{
|
||||
int ret;
|
||||
struct fpga_dm *d = n->_vd;
|
||||
struct fpga *f = d->card;
|
||||
struct sample *smp = smps[0];
|
||||
|
||||
char *tmp = f->dma + 0x1000;
|
||||
char *addr = (char *) smp->values;
|
||||
size_t sentlen;
|
||||
size_t len = smp->length * sizeof(smp->values[0]);
|
||||
|
||||
|
|
@ -420,9 +410,9 @@ int fpga_write(struct node *n, struct sample *smps[], unsigned cnt)
|
|||
/* Send data to RTDS */
|
||||
switch (d->type) {
|
||||
case FPGA_DM_DMA:
|
||||
memcpy(tmp, addr, len);
|
||||
memcpy(d->dma.base_virt, smp->values, len);
|
||||
|
||||
ret = dma_write(d->ip, tmp, len);
|
||||
ret = dma_write(d->ip, d->dma.base_phys, len);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -434,7 +424,8 @@ int fpga_write(struct node *n, struct sample *smps[], unsigned cnt)
|
|||
|
||||
return 1;
|
||||
case FPGA_DM_FIFO:
|
||||
sentlen = fifo_write(d->ip, addr, len);
|
||||
sentlen = fifo_write(d->ip, (char *) smp->values, len);
|
||||
return sentlen / sizeof(smp->values[0]);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue