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lib/ip: re-add IRQ to IpCore

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This commit is contained in:
daniel-k 2017-12-21 21:18:52 +01:00
parent ab183d2111
commit 9676a9535d
2 changed files with 7 additions and 8 deletions
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7
fpga/include/villas/fpga/ip.hpp
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@ -75,7 +75,7 @@ public:
friend IpCoreFactory;
IpCore() : card(nullptr), baseaddr(0) {} //, irq(-1), port(-1) {}
IpCore() : card(nullptr), baseaddr(0), irq(-1) {}
virtual ~IpCore() {}
// IPs can implement this interface
@ -108,10 +108,9 @@ protected:
protected:
// populated by FpgaIpFactory
PCIeCard* card; /**< FPGA card this IP is instantiated on */
IpIdentifier id; /**< VLNV and name defined in JSON config */
IpIdentifier id; /**< VLNV and name defined in JSON config */
uintptr_t baseaddr; /**< The baseadress of this FPGA IP component */
// int irq; /**< The interrupt number of the FPGA IP component. */
// int port; /**< The port of the AXI4-Stream switch to which this FPGA IP component is connected. */
int irq; /**< The interrupt number of the FPGA IP component. */
std::map<std::string, IpCore*> dependencies;
};

8
fpga/lib/ip.cpp
View file

@ -227,10 +227,10 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
ip->id = id;
// extract some optional properties
int ret = json_unpack(json_ip, "{ s?: i}", //, s?: i, s?: i }",
"baseaddr", &ip->baseaddr);
// "irq", &ip->irq,
// "port", &ip->port);
int ret = json_unpack(json_ip, "{ s?: i, s?: i }",
"baseaddr", &ip->baseaddr, // required
"irq", &ip->irq); // optional
if(ret != 0) {
cpp_warn << "Problem while parsing JSON for IP "
<< TXT_BOLD(ipName);