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update year in copyright notices

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Steffen Vogel 2022-08-30 12:15:17 -04:00
parent c7180e729a
commit 9ef01d068e
73 changed files with 84 additions and 73 deletions
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2
fpga/CMakeLists.txt
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@ -1,7 +1,7 @@
## CMakeLists.txt
#
# @author Daniel Krebs <github@daniel-krebs.net>
# @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
# @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

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fpga/Dockerfile
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# make docker
#
# @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
# @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
# @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

2
fpga/etc/fpga-simple.conf
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@ -5,7 +5,7 @@
* http://www.hyperrealm.com/libconfig/libconfig_manual.html#Configuration-Files
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

10
fpga/etc/fpgas.json Normal file
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@ -0,0 +1,10 @@
{
"fpgas": {
"vc707": {
"id": "10ee:7021",
"slot": "0000:88:00.0",
"do_reset": true,
"ips": "etc/vc707-xbar-pcie/vc707-xbar-pcie.json"
}
}
}

2
fpga/gpu/CMakeLists.txt
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@ -1,7 +1,7 @@
## CMakeLists.txt
#
# @author Daniel Krebs <github@daniel-krebs.net>
# @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
# @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

2
fpga/gpu/include/villas/gpu.hpp
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@ -2,7 +2,7 @@
*
* @file
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/gpu/kernels.hpp
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@ -2,7 +2,7 @@
*
* @file
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/gpu/src/gpu.cpp
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@ -2,7 +2,7 @@
*
* @file
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/gpu/src/kernels.cu
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@ -2,7 +2,7 @@
*
* @file
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/card.hpp
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@ -5,7 +5,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/config.h
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@ -5,7 +5,7 @@
*
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/core.hpp
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@ -5,7 +5,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/aurora.hpp
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@ -2,7 +2,7 @@
*
* @file
* @author Hatim Kanchwala <hatim@hatimak.me>
* @copyright 2020, Hatim Kanchwala
* @copyright 2020-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/aurora_xilinx.hpp
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@ -1,7 +1,7 @@
/** Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b)
*
* @author Steffen Vogel <post@steffenvogel.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/bram.hpp
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/** Block-Raam related helper functions
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2018, Daniel Krebs
* @copyright 2018-2022, Daniel Krebs
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/dft.h
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@ -2,7 +2,7 @@
*
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/dma.hpp
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/** DMA driver
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
* @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/fifo.hpp
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*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/intc.hpp
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@ -3,7 +3,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/model.h
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@ -2,7 +2,7 @@
*
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/pcie.hpp
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@ -5,7 +5,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/rtds.hpp
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@ -2,7 +2,7 @@
*
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/switch.hpp
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@ -5,7 +5,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/ips/timer.hpp
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@ -4,7 +4,7 @@
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/node.hpp
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@ -5,7 +5,7 @@
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/include/villas/fpga/vlnv.hpp
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@ -2,7 +2,7 @@
*
* @file
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/CMakeLists.txt
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@ -1,7 +1,7 @@
## CMakeLists.txt
#
# @author Daniel Krebs <github@daniel-krebs.net>
# @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
# @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

2
fpga/lib/card.cpp
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/** FPGA card.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/core.cpp
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/** FPGA IP component.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/aurora.cpp
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@ -1,7 +1,7 @@
/** Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora)
*
* @author Hatim Kanchwala <hatim@hatimak.me>
* @copyright 2020, Hatim Kanchwala
* @copyright 2020-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/aurora_xilinx.cpp
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@ -1,7 +1,7 @@
/** Driver for wrapper around standard Xilinx Aurora (xilinx.com:ip:aurora_8b10b)
*
* @author Steffen Vogel <post@steffenvogel.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/bram.cpp
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/** Block RAM IP.
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/dft.c
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/** Moving window / Recursive DFT implementation based on HLS
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/dma.cpp
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/** DMA driver
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
* @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/fifo.cpp
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*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/intc.cpp
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/** AXI-PCIe Interrupt controller
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/model.c
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/** Interface to Xilinx System Generator Models via PCIe
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/pcie.cpp
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/** AXI PCIe bridge
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
* @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/rtds.cpp
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/** Driver for AXI Stream wrapper around RTDS_InterfaceModule (rtds_axis )
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/switch.cpp
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@ -4,7 +4,7 @@
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/ips/timer.cpp
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@ -4,7 +4,7 @@
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/memory.cpp
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/** Memory managment.
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/node.cpp
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/** An IP node.
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/lib/vlnv.cpp
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/** Vendor, Library, Name, Version (VLNV) tag
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
* @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/scripts/non_root.sh
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# Setup VFIO for non-root users
#
# @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
# @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
# @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASnode

2
fpga/scripts/rebind_device.sh
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# Detach and rebind a PCI device to a PCI kernel driver
#
# @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
# @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
# @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASnode

2
fpga/scripts/reset_pci_device.sh
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# Reset PCI devices like FPGAs after a reflash
#
# @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
# @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
# @copyright 2017-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASnode

2
fpga/src/CMakeLists.txt
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## CMakeLists.txt
#
# @author Daniel Krebs <github@daniel-krebs.net>
# @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
# @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

2
fpga/src/bench-datamovers.c
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/** Data mover benchmarks.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench-jitter.c
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/** Jitter benchmarks.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench-latency.c
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/** Latency benchmarks.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench-memcpy.c
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/** Memcpy benchmarks.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench-overruns.c
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@ -1,7 +1,7 @@
/** Benchmarks for VILLASfpga: LAPACK & BLAS
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench.c
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/** Benchmarks for VILLASfpga
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/bench.h
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@ -1,7 +1,7 @@
/** Benchmarks for VILLASfpga
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/src/fpga.c
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/** VILLASfpga utility for tests and benchmarks
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

5
fpga/src/pcimem.c
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@ -1,9 +1,10 @@
/** Simple program to read/write from/to a pci device from userspace.
*
* @Copyright 2010, Bill Farrow (bfarrow@beyondelectronics.us)
* @copyright 2010, Bill Farrow (bfarrow@beyondelectronics.us)
* @copyright 2022, Institute for Automation of Complex Power Systems, EONERC
*
* Based on the devmem2.c code
* @copyright 2000, Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
* @copyright 2000, Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* VILLASfpga
*

2
fpga/src/villas-fpga-pipe.cpp
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/** Streaming data from STDIN/OUT to FPGA.
*
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/CMakeLists.txt
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@ -1,7 +1,7 @@
## CMakeLists.txt
#
# @author Daniel Krebs <github@daniel-krebs.net>
# @copyright 2018, RWTH Institute for Automation of Complex Power Systems (ACS)
# @copyright 2018-2022, Institute for Automation of Complex Power Systems, EONERC
# @license GNU General Public License (version 3)
#
# VILLASfpga

2
fpga/tests/unit/dma.cpp
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/** DMA unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/fifo.cpp
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@ -1,7 +1,7 @@
/** FIFO unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/fpga.cpp
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@ -1,7 +1,7 @@
/** FPGA related code for bootstrapping the unit-tests
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2018, Steffen Vogel
* @copyright 2018-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/global.hpp
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@ -1,7 +1,7 @@
/** Global include for tests.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/gpu.cpp
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@ -1,7 +1,7 @@
/** GPU unit tests.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/hls.c
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@ -1,7 +1,7 @@
/** HLS unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/intc.c
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@ -1,7 +1,7 @@
/** Intc unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/logging.cpp
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@ -1,7 +1,7 @@
/** Logging utilities for unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/main.cpp
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@ -1,7 +1,7 @@
/** Main Unit Test entry point.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/rtds.cpp
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@ -2,7 +2,7 @@
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @author Daniel Krebs <github@daniel-krebs.net>
* @copyright 2018, Steffen Vogel, Daniel Krebs
* @copyright 2018-2022, Steffen Vogel, Daniel Krebs
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/rtds2gpu.cpp
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@ -2,7 +2,7 @@
*
* @file
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/rtds_rtt.cpp
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@ -1,7 +1,7 @@
/** RTDS AXI-Stream RTT unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/timer.cpp
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@ -1,7 +1,7 @@
/** Timer/Counter unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga

2
fpga/tests/unit/xsg.c
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@ -1,7 +1,7 @@
/** System Generator unit test.
*
* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Steffen Vogel
* @copyright 2017-2022, Steffen Vogel
* @license GNU General Public License (version 3)
*
* VILLASfpga