mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
remove useless includes
This commit is contained in:
parent
894460cd7b
commit
add8dad95b
3 changed files with 2 additions and 5 deletions
|
@ -24,7 +24,6 @@
|
|||
|
||||
#include <villas/utils.hpp>
|
||||
|
||||
#include <villas/fpga/card.hpp>
|
||||
#include <villas/fpga/ips/aurora.hpp>
|
||||
|
||||
// Register offsets
|
||||
|
|
|
@ -24,7 +24,6 @@
|
|||
|
||||
#include <villas/utils.hpp>
|
||||
|
||||
#include <villas/fpga/card.hpp>
|
||||
#include <villas/fpga/ips/aurora_xilinx.hpp>
|
||||
|
||||
using namespace villas::fpga::ip;
|
||||
|
|
|
@ -24,13 +24,12 @@
|
|||
|
||||
#include <villas/utils.hpp>
|
||||
|
||||
#include <villas/fpga/card.hpp>
|
||||
#include <villas/fpga/ips/rtds.hpp>
|
||||
|
||||
#define RTDS_HZ 100000000 // 100 MHz
|
||||
|
||||
#define RTDS_AXIS_MAX_TX 64 // The amount of values which is supported by the vfpga card
|
||||
#define RTDS_AXIS_MAX_RX 64 // The amount of values which is supported by the vfpga card
|
||||
#define RTDS_AXIS_MAX_TX 64 // The amount of values which is supported by the VIILASfpga card
|
||||
#define RTDS_AXIS_MAX_RX 64 // The amount of values which is supported by the VIILASfpga card
|
||||
|
||||
// Register offsets
|
||||
#define RTDS_AXIS_SR_OFFSET 0x00 // Status Register (read-only). See RTDS_AXIS_SR_* constant.
|
||||
|
|
Loading…
Add table
Reference in a new issue