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fpga: add --timestep option to villas-fpga-ctrl
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
parent
e5ab276566
commit
bb820d8909
1 changed files with 4 additions and 48 deletions
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@ -69,52 +69,6 @@ void writeToDmaFromStdIn(std::shared_ptr<villas::fpga::ip::Dma> dma) {
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auto writeComp = dma->writeComplete();
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logger->debug("Wrote {} bytes", writeComp.bytes);
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}
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// auto &alloc = villas::HostRam::getAllocator();
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// const std::shared_ptr<villas::MemoryBlock> block[] = {
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// alloc.allocateBlock(0x200 * sizeof(uint32_t)),
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// alloc.allocateBlock(0x200 * sizeof(uint32_t))
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// };
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// villas::MemoryAccessor<int32_t> mem[] = {*block[0], *block[1]};
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// for (auto b : block) {
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// dma->makeAccesibleFromVA(b);
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// }
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// size_t cur = 0, next = 1;
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// std::ios::sync_with_stdio(false);
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// std::string line;
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// bool firstXfer = true;
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// while(true) {
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// // Read values from stdin
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// std::getline(std::cin, line);
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// auto values = villas::utils::tokenize(line, ";");
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// size_t i = 0;
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// for (auto &value: values) {
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// if (value.empty()) continue;
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// const float number = std::stof(value);
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// mem[cur][i++] = number;
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// }
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// // Initiate write transfer
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// bool state = dma->write(*block[cur], i * sizeof(float));
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// if (!state)
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// logger->error("Failed to write to device");
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// if (!firstXfer) {
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// auto bytesWritten = dma->writeComplete();
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// logger->debug("Wrote {} bytes", bytesWritten.bytes);
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// } else {
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// firstXfer = false;
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// }
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// cur = next;
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// next = (next + 1) % (sizeof(mem) / sizeof(mem[0]));
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// }
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}
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void readFromDmaToStdOut(
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@ -196,9 +150,11 @@ int main(int argc, char *argv[]) {
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bool dumpGraph = false;
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app.add_flag("--dump-graph", dumpGraph,
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"Dumps the graph of memory regions into \"graph.dot\"");
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bool dumpAuroraChannels = true;
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bool dumpAuroraChannels = false;
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app.add_flag("--dump-aurora", dumpAuroraChannels,
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"Dumps the detected Aurora channels.");
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double timestep = 10e-3;
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app.add_option("--timestep", timestep, "Timestep generated in the FPGA");
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app.parse(argc, argv);
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// Logging setup
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@ -249,7 +205,7 @@ int main(int argc, char *argv[]) {
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if (reg != nullptr &&
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card->lookupIp(fpga::Vlnv("xilinx.com:module_ref:dinoif_fast:"))) {
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fpga::ip::DinoAdc::setRegisterConfigTimestep(reg, 10e-3);
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fpga::ip::DinoAdc::setRegisterConfigTimestep(reg, timestep);
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}
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if (writeToStdout || readFromStdin) {
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