update to latest VILLAScommon submodule

fpga/CMakeLists.txt

@@ -20,9 +20,12 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 ##############################################################################
  
- cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.5)
 
-project(VILLASfpga C CXX)
+project(VILLASfpga
+	LANGUAGES C CXX
+	VERSION 0.1.0
+)
 
 set(CMAKE_MODULE_PATH ${CMAKE_CURRENT_LIST_DIR}/cmake)
 

fpga/common

@@ -1 +1 @@
-Subproject commit e2ab88e67c79be5d4cae71164be3eabb232ddc04
+Subproject commit 5071327844fd93de6d44ce9e47459a41b9bd17cb

fpga/gpu/include/villas/gpu.hpp

@@ -74,7 +74,7 @@ private:
 
 	MemoryManager::AddressSpaceId slaveMemoryAddrSpaceId;
 
-	SpdLogger logger;
+	Logger logger;
 
 	int gpuId;
 
@@ -109,7 +109,7 @@ public:
 	void run(void*);
 
 private:
-	SpdLogger logger;
+	Logger logger;
 };
 
 } // namespace villas

fpga/gpu/src/gpu.cpp

@@ -69,9 +69,9 @@ villas::gpu::GpuAllocator::getName() const
 
 
 GpuFactory::GpuFactory() :
-    Plugin(Plugin::Type::Gpu, "GPU")
+    Plugin("GPU", "GpuFactory")
 {
-	logger = loggerGetOrCreate("GpuFactory");
+	logger = villas::logging.get("GpuFactory");
 }
 
 // required to be defined here for PIMPL to compile
@@ -94,7 +94,7 @@ std::string Gpu::getName() const
 	cudaDeviceProp deviceProp;
 	if(cudaGetDeviceProperties(&deviceProp, gpuId) != cudaSuccess) {
 		// logger not yet availabe
-		loggerGetOrCreate("Gpu")->error("Cannot retrieve properties for GPU {}", gpuId);
+		villas::logging.get("Gpu")->error("Cannot retrieve properties for GPU {}", gpuId);
 		throw std::exception();
 	}
 
@@ -442,7 +442,7 @@ Gpu::Gpu(int gpuId) :
     pImpl{std::make_unique<impl>()},
     gpuId(gpuId)
 {
-	logger = loggerGetOrCreate(getName());
+	logger = villas::logging.get(getName());
 
 	pImpl->gdr = gdr_open();
 	if(pImpl->gdr == nullptr) {

fpga/include/villas/fpga/card.hpp

@@ -112,20 +112,20 @@ public:	// TODO: make this private
 	MemoryManager::AddressSpaceId addrSpaceIdHostToDevice;
 
 protected:
-	SpdLogger
+	Logger
 	getLogger() const
-	{ return loggerGetOrCreate(name); }
+	{ return villas::logging.get(name); }
 
-	SpdLogger logger;
+	Logger logger;
 };
 
 using CardList = std::list<std::shared_ptr<PCIeCard>>;
 
-class PCIeCardFactory : public Plugin {
+class PCIeCardFactory : public plugin::Plugin {
 public:
 
 	PCIeCardFactory() :
-	    Plugin(Plugin::Type::FpgaCard, "FPGA Card plugin") {}
+	    Plugin("pcie", "Xilinx PCIe FPGA cards") {}
 
 	static CardList
 	make(json_t *json, struct pci* pci, std::shared_ptr<VfioContainer> vc);
@@ -133,9 +133,9 @@ public:
 	static PCIeCard*
 	create();
 
-	static SpdLogger
+	static Logger
 	getStaticLogger()
-	{ return loggerGetOrCreate("PCIeCardFactory"); }
+	{ return villas::logging.get("PCIeCardFactory"); }
 };
 
 } // namespace fpga

fpga/include/villas/fpga/ip.hpp

@@ -37,6 +37,7 @@
 #include <jansson.h>
 
 #include <villas/log.hpp>
+#include <villas/colors.hpp>
 #include <villas/memory.hpp>
 #include <villas/plugin.hpp>
 
@@ -76,7 +77,7 @@ public:
 
 	friend std::ostream&
 	operator<< (std::ostream& stream, const IpIdentifier& id)
-	{ return stream << TXT_BOLD(id.name) << " vlnv=" << id.vlnv; }
+	{ return stream << id.name << " vlnv=" << id.vlnv; }
 
 	bool
 	operator==(const IpIdentifier& otherId) const {
@@ -212,7 +213,7 @@ protected:
 	};
 
 	/// Specialized logger instance with the IPs name set as category
-	SpdLogger logger;
+	Logger logger;
 
 	/// FPGA card this IP is instantiated on (populated by FpgaIpFactory)
 	PCIeCard* card;
@@ -235,20 +236,18 @@ protected:
 
 
 
-class IpCoreFactory : public Plugin {
+class IpCoreFactory : public plugin::Plugin {
 public:
-	IpCoreFactory(std::string concreteName) :
-	    Plugin(Plugin::Type::FpgaIp, std::string("IpCore - ") + concreteName)
-	{}
+	using plugin::Plugin::Plugin;
 
 	/// Returns a running and checked FPGA IP
 	static IpCoreList
 	make(PCIeCard* card, json_t *json_ips);
 
 protected:
-	SpdLogger
+	Logger
 	getLogger() const
-	{ return loggerGetOrCreate(getName()); }
+	{ return villas::logging.get(getName()); }
 
 private:
 	/// Create a concrete IP instance
@@ -263,8 +262,8 @@ private:
 	virtual std::string getDescription() const = 0;
 
 protected:
-	static SpdLogger
-	getStaticLogger() { return loggerGetOrCreate("IpCoreFactory"); }
+	static Logger
+	getStaticLogger() { return villas::logging.get("IpCoreFactory"); }
 
 private:
 	static IpCoreFactory*

fpga/include/villas/fpga/ip_node.hpp

@@ -140,7 +140,7 @@ protected:
 
 class IpNodeFactory : public IpCoreFactory {
 public:
-	IpNodeFactory(std::string name) : IpCoreFactory("Ip Node - " + name) {}
+	using IpCoreFactory::IpCoreFactory;
 
 	virtual bool configureJson(IpCore& ip, json_t *json_ip);
 };

fpga/include/villas/fpga/ips/aurora.hpp

@@ -51,6 +51,12 @@ public:
 	getDefaultMasterPort() const
 	{ return getMasterPort(masterPort); }
 
+	void
+	setLoopback(bool state);
+
+	void
+	resetFrameCounters();
+
 private:
 	static constexpr const char registerMemory[] = "reg0";
 };
@@ -74,12 +80,6 @@ public:
 	Vlnv getCompatibleVlnv() const
 	{ return {"acs.eonerc.rwth-aachen.de:user:aurora_axis:"}; }
 
-	void
-	setLoopback(bool state);
-
-	void
-	resetFrameCounters();
-
 };
 
 } // namespace ip

fpga/include/villas/fpga/ips/bram.hpp

@@ -60,7 +60,7 @@ class BramFactory : public IpCoreFactory {
 public:
 
 	BramFactory() :
-	    IpCoreFactory(getName())
+	    IpCoreFactory(getName(), getDescription())
 	{}
 
 	bool configureJson(IpCore& ip, json_t *json_ip);

fpga/include/villas/fpga/ips/intc.hpp

@@ -85,7 +85,7 @@ class InterruptControllerFactory : public IpCoreFactory {
 public:
 
 	InterruptControllerFactory() :
-	    IpCoreFactory(getName())
+	    IpCoreFactory(getName(), getDescription())
 	{}
 
 	static constexpr const char*

fpga/include/villas/fpga/ips/pcie.hpp

@@ -66,7 +66,7 @@ private:
 class AxiPciExpressBridgeFactory : public IpCoreFactory {
 public:
 	AxiPciExpressBridgeFactory() :
-	    IpCoreFactory(getName()) {}
+	    IpCoreFactory(getName(), getDescription()) {}
 
 	static constexpr const char*
 	getCompatibleVlnvString()

fpga/include/villas/fpga/ips/switch.hpp

@@ -73,7 +73,7 @@ private:
 class AxiStreamSwitchFactory : public IpNodeFactory {
 public:
 	AxiStreamSwitchFactory() :
-	    IpNodeFactory(getName()) {}
+	    IpNodeFactory(getName(), getDescription()) {}
 
 	static constexpr const char*
 	getCompatibleVlnvString()

fpga/include/villas/fpga/ips/timer.hpp

@@ -77,7 +77,7 @@ class TimerFactory : public IpCoreFactory {
 public:
 
 	TimerFactory() :
-	    IpCoreFactory(getName())
+	    IpCoreFactory(getName(), getDescription())
 	{}
 
 	IpCore* create()

fpga/lib/ip.cpp

@@ -100,7 +100,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 
 	loggerStatic->debug("IP initialization order:");
 	for(auto& id : orderedIps) {
-		loggerStatic->debug("  {}", TXT_BOLD(id.getName()));
+		loggerStatic->debug("  " CLR_BLD("{}"), id.getName());
 	}
 
 	// configure all IPs
@@ -141,7 +141,7 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 		// setup generic IP type properties
 		ip->card = card;
 		ip->id = id;
-		ip->logger = loggerGetOrCreate(id.getName());
+		ip->logger = villas::logging.get(id.getName());
 
 		json_t* json_ip = json_object_get(json_ips, id.getName().c_str());
 
@@ -157,8 +157,8 @@ IpCoreFactory::make(PCIeCard* card, json_t *json_ips)
 
 				auto tokens = utils::tokenize(irqEntry, ":");
 				if(tokens.size() != 2) {
-					logger->warn("Cannot parse IRQ '{}' of {}",
-					             irqEntry, TXT_BOLD(id.getName()));
+					logger->warn("Cannot parse IRQ '{}' of " CLR_BLD("{}"),
+					             irqEntry, id.getName());
 					continue;
 				}
 
@@ -335,11 +335,9 @@ IpCore::dump()
 IpCoreFactory*
 IpCoreFactory::lookup(const Vlnv &vlnv)
 {
-	for(auto& ip : Plugin::lookup(Plugin::Type::FpgaIp)) {
-		IpCoreFactory* ipCoreFactory = dynamic_cast<IpCoreFactory*>(ip);
-
-		if(ipCoreFactory->getCompatibleVlnv() == vlnv)
-			return ipCoreFactory;
+	for(auto& ip : plugin::Registry::lookup<IpCoreFactory>()) {
+		if(ip->getCompatibleVlnv() == vlnv)
+			return ip;
 	}
 
 	return nullptr;

fpga/lib/ips/aurora.cpp

@@ -22,7 +22,7 @@
 
 #include <cstdint>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/ips/aurora.hpp>
@@ -120,7 +120,7 @@ void Aurora::resetFrameCounters()
 }
 
 AuroraFactory::AuroraFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 }
 

fpga/lib/ips/dma.cpp

@@ -43,7 +43,7 @@ namespace ip {
 static DmaFactory factory;
 
 DmaFactory::DmaFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 	// nothing to do
 }

fpga/lib/ips/fifo.cpp

@@ -42,13 +42,13 @@ static FifoDataFactory factoryData;
 
 
 FifoFactory::FifoFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 	// nothing to do
 }
 
 FifoDataFactory::FifoDataFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 	// nothing to do
 }

fpga/lib/ips/intc.cpp

@@ -26,7 +26,7 @@
 #include <villas/config.h>
 #include <villas/plugin.hpp>
 
-#include <villas/kernel/kernel.h>
+#include <villas/kernel/kernel.hpp>
 
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/ips/intc.hpp>
@@ -61,7 +61,7 @@ InterruptController::init()
 	for (int i = 0; i < num_irqs; i++) {
 
 		/* Try pinning to core */
-		int ret = kernel_irq_setaffinity(nos[i], card->affinity, nullptr);
+		int ret = kernel::irq_setaffinity(nos[i], card->affinity, nullptr);
 
 		switch(ret) {
 		case 0:

fpga/lib/ips/model.c

@@ -25,7 +25,7 @@
 #include <string.h>
 #include <math.h>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/log.h>
 #include <villas/log_config.h>
 #include <villas/plugin.h>

fpga/lib/ips/rtds.cpp

@@ -22,7 +22,7 @@
 
 #include <cstdint>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/ips/rtds.hpp>
@@ -93,7 +93,7 @@ double Rtds::getDt()
 }
 
 RtdsFactory::RtdsFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 }
 

fpga/lib/ips/rtds2gpu/gpu2rtds.cpp

@@ -132,7 +132,7 @@ Gpu2Rtds::getMaxFrameSize()
 //}
 
 Gpu2RtdsFactory::Gpu2RtdsFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 }
 

fpga/lib/ips/rtds2gpu/rtds2gpu.cpp

@@ -82,10 +82,6 @@ bool Rtds2Gpu::startOnce(const MemoryBlock& mem, size_t frameSize, size_t dataOf
 	return start();
 }
 
-
-
-
-
 bool
 Rtds2Gpu::updateStatus()
 {
@@ -121,7 +117,7 @@ Rtds2Gpu::dumpDoorbell(uint32_t doorbellRegister) const
 }
 
 Rtds2GpuFactory::Rtds2GpuFactory() :
-    IpNodeFactory(getName())
+    IpNodeFactory(getName(), getDescription())
 {
 }
 

fpga/src/bench-datamovers.c

@@ -20,7 +20,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  *********************************************************************************/
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/log.h>
 
 #include <villas/fpga/card.h>

fpga/src/bench-jitter.c

@@ -20,7 +20,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  *********************************************************************************/
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.h>
 #include <villas/fpga/ip.h>

fpga/src/bench-latency.c

@@ -23,7 +23,7 @@
 #include <stdio.h>
 
 #include <villas/log.h>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.h>
 #include <villas/fpga/ip.h>

fpga/src/bench-memcpy.c

@@ -20,7 +20,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  *********************************************************************************/
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.h>
 

fpga/src/bench.c

@@ -23,7 +23,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/log.h>
 
 #include <villas/fpga/ip.h>

fpga/src/fpga.c

@@ -26,10 +26,10 @@
 #include <getopt.h>
 
 #include <villas/log.h>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/kernel/pci.h>
-#include <villas/kernel/kernel.h>
+#include <villas/kernel/kernel.hpp>
 
 #include <villas/fpga/card.h>
 

fpga/src/villas-fpga-pipe.cpp

@@ -31,7 +31,7 @@
 #include <rang.hpp>
 
 #include <villas/log.hpp>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/utils.hpp>
 
 #include <villas/fpga/ip.hpp>
@@ -44,7 +44,7 @@
 using namespace villas;
 
 static struct pci pci;
-static auto logger = loggerGetOrCreate("streamer");
+static auto logger = villas::logging.get("streamer");
 
 void setupColorHandling()
 {
@@ -95,15 +95,12 @@ setupFpgaCard(const std::string& configFile, const std::string& fpgaName)
 	}
 
 	// get the FPGA card plugin
-	villas::Plugin* plugin = villas::Plugin::lookup(villas::Plugin::Type::FpgaCard, "");
-	if(plugin == nullptr) {
+	auto fpgaCardPlugin = plugin::Registry::lookup<fpga::PCIeCardFactory>("");
+	if(fpgaCardPlugin == nullptr) {
 		logger->error("No FPGA plugin found");
 		exit(1);
 	}
 
-	villas::fpga::PCIeCardFactory* fpgaCardPlugin =
-	        dynamic_cast<villas::fpga::PCIeCardFactory*>(plugin);
-
 	// create all FPGA card instances using the corresponding plugin
 	auto cards = fpgaCardPlugin->make(fpgas, &pci, vfioContainer);
 

fpga/tests/dma.cpp

@@ -23,30 +23,30 @@
 #include <criterion/criterion.h>
 
 #include <villas/log.hpp>
+#include <villas/utils.hpp>
+#include <villas/memory.hpp>
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/ips/dma.hpp>
 #include <villas/fpga/ips/bram.hpp>
 
-#include <villas/utils.h>
-
 #include "global.hpp"
 
-#include <villas/memory.hpp>
+using namespace villas;
 
 
 Test(fpga, dma, .description = "DMA")
 {
-	auto logger = loggerGetOrCreate("unittest:dma");
+	auto logger = logging.get("unittest:dma");
 
 	size_t count = 0;
 	for(auto& ip : state.cards.front()->ips) {
 		// skip non-dma IPs
-		if(*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_dma:"))
+		if(*ip != fpga::Vlnv("xilinx.com:ip:axi_dma:"))
 			continue;
 
 		logger->info("Testing {}", *ip);
 
-		auto dma = dynamic_cast<villas::fpga::ip::Dma&>(*ip);
+		auto dma = dynamic_cast<fpga::ip::Dma&>(*ip);
 
 		if(not dma.loopbackPossible()) {
 			logger->info("Loopback test not possible for {}", *ip);
@@ -61,22 +61,22 @@ Test(fpga, dma, .description = "DMA")
 		size_t len = 4 * (1 << 10);
 
 		// find a block RAM IP to write to
-		auto bramIp = state.cards.front()->lookupIp(villas::fpga::Vlnv("xilinx.com:ip:axi_bram_ctrl:"));
-		auto bram = reinterpret_cast<villas::fpga::ip::Bram*>(bramIp);
+		auto bramIp = state.cards.front()->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_bram_ctrl:"));
+		auto bram = reinterpret_cast<fpga::ip::Bram*>(bramIp);
 		cr_assert_not_null(bram, "Couldn't find BRAM");
 
 
 		/* Allocate memory to use with DMA */
-		auto src = villas::HostDmaRam::getAllocator().allocate<char>(len);
-		auto dst = villas::HostDmaRam::getAllocator().allocate<char>(len);
+		auto src = HostDmaRam::getAllocator().allocate<char>(len);
+		auto dst = HostDmaRam::getAllocator().allocate<char>(len);
 
 		/* ... only works with IOMMU enabled currently */
 //		auto src = bram->getAllocator().allocate<char>(len);
 //		auto dst = bram->getAllocator().allocate<char>(len);
 
 		/* ... only works with IOMMU enabled currently */
-//		auto src = villas::HostRam::getAllocator().allocate<char>(len);
-//		auto dst = villas::HostRam::getAllocator().allocate<char>(len);
+//		auto src = HostRam::getAllocator().allocate<char>(len);
+//		auto dst = HostRam::getAllocator().allocate<char>(len);
 
 		/* Make sure memory is accessible for DMA */
 		cr_assert(dma.makeAccesibleFromVA(src.getMemoryBlock()),
@@ -85,7 +85,7 @@ Test(fpga, dma, .description = "DMA")
 		          "Destination memory not accessible for DMA");
 
 		/* Get new random data */
-		const size_t lenRandom = read_random(&src, len);
+		const size_t lenRandom = utils::read_random(&src, len);
 		cr_assert(len == lenRandom, "Failed to get random data");
 
 
@@ -97,10 +97,10 @@ Test(fpga, dma, .description = "DMA")
 		/* Compare data */
 		cr_assert(memcmp(&src, &dst, len) == 0, "Data not equal");
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 
-	villas::MemoryManager::get().dump();
+	MemoryManager::get().dump();
 
 	cr_assert(count > 0, "No Dma found");
 }

fpga/tests/fifo.cpp

@@ -23,13 +23,14 @@
 #include <criterion/criterion.h>
 
 #include <villas/log.hpp>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/ips/fifo.hpp>
 
 #include "global.hpp"
 
+using namespace villas;
 
 Test(fpga, fifo, .description = "FIFO")
 {
@@ -37,16 +38,16 @@ Test(fpga, fifo, .description = "FIFO")
 	char src[255], dst[255];
 	size_t count = 0;
 
-	auto logger = loggerGetOrCreate("unittest:fifo");
+	auto logger = logging.get("unittest:fifo");
 
 	for(auto& ip : state.cards.front()->ips) {
 		// skip non-fifo IPs
-		if(*ip != villas::fpga::Vlnv("xilinx.com:ip:axi_fifo_mm_s:"))
+		if(*ip != fpga::Vlnv("xilinx.com:ip:axi_fifo_mm_s:"))
 			continue;
 
 		logger->info("Testing {}", *ip);
 
-		auto fifo = dynamic_cast<villas::fpga::ip::Fifo&>(*ip);
+		auto fifo = dynamic_cast<fpga::ip::Fifo&>(*ip);
 
 		if(not fifo.connectLoopback()) {
 			continue;
@@ -61,7 +62,7 @@ Test(fpga, fifo, .description = "FIFO")
 
 		/* Get some random data to compare */
 		memset(dst, 0, sizeof(dst));
-		len = read_random((char *) src, sizeof(src));
+		len = utils::read_random((char *) src, sizeof(src));
 		if (len != sizeof(src)) {
 			logger->error("Failed to get random data");
 			continue;
@@ -82,7 +83,7 @@ Test(fpga, fifo, .description = "FIFO")
 		/* Compare data */
 		cr_assert_eq(memcmp(src, dst, sizeof(src)), 0, "Data not equal");
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 
 	cr_assert(count > 0, "No fifo found");

fpga/tests/fpga.cpp

@@ -22,7 +22,7 @@
 
 #include <criterion/criterion.h>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/fpga/ip.hpp>
 #include <villas/fpga/card.hpp>
 #include <villas/fpga/vlnv.hpp>
@@ -38,6 +38,8 @@
 #define CPU_HZ		3392389000
 #define FPGA_AXI_HZ	125000000
 
+using namespace villas;
+
 static struct pci pci;
 
 FpgaState state;
@@ -52,12 +54,12 @@ static void init()
 	spdlog::set_level(spdlog::level::debug);
 	spdlog::set_pattern("[%T] [%l] [%n] %v");
 
-	villas::Plugin::dumpList();
+	plugin::Registry::dumpList();
 
 	ret = pci_init(&pci);
 	cr_assert_eq(ret, 0, "Failed to initialize PCI sub-system");
 
-	auto vfioContainer = villas::VfioContainer::create();
+	auto vfioContainer = VfioContainer::create();
 
 	/* Parse FPGA configuration */
 	f = fopen(TEST_CONFIG, "r");
@@ -73,9 +75,8 @@ static void init()
 	cr_assert(json_object_size(json) > 0, "No FPGAs defined in config");
 
 	// get the FPGA card plugin
-	villas::Plugin* plugin = villas::Plugin::lookup(villas::Plugin::Type::FpgaCard, "");
-	cr_assert_not_null(plugin, "No plugin for FPGA card found");
-	villas::fpga::PCIeCardFactory* fpgaCardPlugin = dynamic_cast<villas::fpga::PCIeCardFactory*>(plugin);
+	auto fpgaCardPlugin = plugin::Registry::lookup<fpga::PCIeCardFactory>("pcie");
+	cr_assert_not_null(fpgaCardPlugin, "No plugin for FPGA card found");
 
 	// create all FPGA card instances using the corresponding plugin
 	state.cards = fpgaCardPlugin->make(fpgas, &pci, vfioContainer);

fpga/tests/gpu.cpp

@@ -30,7 +30,7 @@
 #include <villas/fpga/ips/dma.hpp>
 #include <villas/fpga/ips/bram.hpp>
 
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include "global.hpp"
 
@@ -40,12 +40,11 @@
 
 Test(fpga, gpu_dma, .description = "GPU DMA tests")
 {
-	auto logger = loggerGetOrCreate("unittest:dma");
+	auto logger = villas::logging.get("unittest:dma");
 
 	auto& card = state.cards.front();
 
-	villas::Plugin* plugin = villas::Plugin::lookup(villas::Plugin::Type::Gpu, "");
-	auto gpuPlugin = dynamic_cast<villas::gpu::GpuFactory*>(plugin);
+	auto gpuPlugin = villas::Plugin::Registry<GpuFactory>("");
 	cr_assert_not_null(gpuPlugin, "No GPU plugin found");
 
 	auto gpus = gpuPlugin->make();
@@ -132,15 +131,15 @@ Test(fpga, gpu_dma, .description = "GPU DMA tests")
 			logger->info("Testing {}", name);
 
 			/* Get new random data */
-			const size_t lenRandom = read_random(&src, len);
+			const size_t lenRandom = utils::read_random(&src, len);
 			cr_assert(len == lenRandom, "Failed to get random data");
 
 			memcpyFunc();
 			const bool success = memcmp(&src, &dst, len) == 0;
 
 			logger->info("  {}", success ?
-			                 TXT_GREEN("Passed") :
-			                 TXT_RED("Failed"));
+			                 CLR_GRN("Passed") :
+			                 CLR_RED("Failed"));
 		}
 
 		villas::MemoryManager::get().dump();

fpga/tests/logging.cpp

@@ -55,7 +55,7 @@ static int format_msg(char *buf, size_t buflen, const char *msg, va_list args)
 
 void criterion_log_noformat(enum criterion_severity severity, const char *msg)
 {
-	auto logger = loggerGetOrCreate("criterion");
+	auto logger = villas::logging.get("criterion");
 	
 	switch (severity) {
 		case CR_LOG_INFO:
@@ -81,7 +81,7 @@ void criterion_vlog(enum criterion_logging_level level, const char *msg, va_list
 
 	format_msg(formatted_msg, sizeof(formatted_msg), msg, args);
 
-	auto logger = loggerGetOrCreate("criterion");
+	auto logger = villas::logging.get("criterion");
 	logger->info(formatted_msg);
 }
 
@@ -98,7 +98,7 @@ void criterion_plog(enum criterion_logging_level level, const struct criterion_p
 	format_msg(formatted_msg, sizeof(formatted_msg), msg, args);
 	va_end(args);
 	
-	auto logger = loggerGetOrCreate("criterion");
+	auto logger = villas::logging.get("criterion");
 
 	if (strstr(formatted_msg, "Warning"))
 		logger->warn(formatted_msg);

fpga/tests/main.cpp

@@ -52,7 +52,7 @@ static bool suite_enabled(struct criterion_test_set *tests, const char *name)
 ReportHook(PRE_ALL)(struct criterion_test_set *tests)
 {
 	if (suite_enabled(tests, "fpga")) {
-		auto logger = loggerGetOrCreate("unittest");
+		auto logger = villas::logging.get("unittest");
 
 		logger->info("FPGA tests enabled. Only 1 job is executed in parallel!.");
 		criterion_options.jobs = 1;

fpga/tests/rtds.cpp

@@ -26,7 +26,7 @@
 #include <criterion/criterion.h>
 
 #include <villas/log.hpp>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 #include <villas/memory.hpp>
 
 #include <villas/fpga/card.hpp>
@@ -35,7 +35,7 @@
 #include <villas/fpga/ips/switch.hpp>
 
 #include <chrono>
-#include <villas/utils.h>
+#include <villas/utils.hpp>
 
 #include "global.hpp"
 
@@ -47,7 +47,7 @@ using namespace villas::fpga::ip;
 
 Test(fpga, rtds, .description = "RTDS")
 {
-	auto logger = loggerGetOrCreate("unittest:rtds");
+	auto logger = villas::logging.get("unittest:rtds");
 
 	std::list<villas::fpga::ip::Rtds*> rtdsIps;
 	std::list<villas::fpga::ip::Dma*> dmaIps;
@@ -132,7 +132,7 @@ Test(fpga, rtds, .description = "RTDS")
 //				}
 			}
 
-			logger->info(TXT_GREEN("Passed"));
+			logger->info(CLR_GRN("Passed"));
 		}
 	}
 }

fpga/tests/rtds2gpu.cpp

@@ -68,7 +68,7 @@ static void dumpMem(const uint32_t* addr, size_t len)
 
 Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu")
 {
-	auto logger = loggerGetOrCreate("unittest:rtds2gpu");
+	auto logger = villas::logging.get("unittest:rtds2gpu");
 
 	for(auto& ip : state.cards.front()->ips) {
 		if(*ip != villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:hls:rtds2gpu:"))
@@ -170,13 +170,13 @@ Test(fpga, rtds2gpu_loopback_dma, .description = "Rtds2Gpu")
 		dumpMem(dataDst, dmaMemDst.getMemoryBlock().getSize());
 		dumpMem(dataDst2, dmaMemDst2.getMemoryBlock().getSize());
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 }
 
 Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU")
 {
-	auto logger = loggerGetOrCreate("unittest:rtds2gpu");
+	auto logger = villas::logging.get("unittest:rtds2gpu");
 
 	/* Collect neccessary IPs */
 
@@ -236,7 +236,7 @@ Test(fpga, rtds2gpu_rtt_cpu, .description = "Rtds2Gpu RTT via CPU")
 			}
 		}
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 }
 
@@ -247,7 +247,7 @@ void gpu_rtds_rtt_stop();
 
 Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU")
 {
-	auto logger = loggerGetOrCreate("unittest:rtds2gpu");
+	auto logger = villas::logging.get("unittest:rtds2gpu");
 
 	/* Collect neccessary IPs */
 
@@ -260,8 +260,7 @@ Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU")
 	cr_assert_not_null(gpu2rtds, "No Gpu2Rtds IP found");
 	cr_assert_not_null(rtds2gpu, "No Rtds2Gpu IP not found");
 
-	villas::Plugin* plugin = villas::Plugin::lookup(villas::Plugin::Type::Gpu, "");
-	auto gpuPlugin = dynamic_cast<villas::gpu::GpuFactory*>(plugin);
+	auto gpuPlugin = villas::Registry::lookup<GpuFactory>("");
 	cr_assert_not_null(gpuPlugin, "No GPU plugin found");
 
 	auto gpus = gpuPlugin->make();
@@ -344,6 +343,6 @@ Test(fpga, rtds2gpu_rtt_gpu, .description = "Rtds2Gpu RTT via GPU")
 
 
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 }

fpga/tests/timer.cpp

@@ -31,7 +31,7 @@
 
 Test(fpga, timer, .description = "Timer Counter")
 {
-	auto logger = loggerGetOrCreate("unittest:timer");
+	auto logger = villas::logging.get("unittest:timer");
 
 	size_t count = 0;
 
@@ -68,7 +68,7 @@ Test(fpga, timer, .description = "Timer Counter")
 		cr_assert(std::abs(durationUs - oneSecondInUs) < 0.01 * oneSecondInUs,
 		          "Timer deviation > 1%%");
 
-		logger->info(TXT_GREEN("Passed"));
+		logger->info(CLR_GRN("Passed"));
 	}
 
 	cr_assert(count > 0, "No timer found");