mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
fpga: remove exceptions from AxisCache
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
parent
5dd12eafc4
commit
cee5f62c2d
2 changed files with 25 additions and 14 deletions
|
@ -30,10 +30,10 @@ protected:
|
|||
std::list<MemoryBlockName> getMemoryBlocks() const override {
|
||||
return {registerMemory};
|
||||
}
|
||||
void setRegister(size_t reg, uint32_t value);
|
||||
uint32_t getRegister(size_t reg);
|
||||
void resetRegister(size_t reg);
|
||||
void resetAllRegisters();
|
||||
bool setRegister(size_t reg, uint32_t value);
|
||||
bool getRegister(size_t reg, uint32_t &value);
|
||||
bool resetRegister(size_t reg);
|
||||
bool resetAllRegisters();
|
||||
};
|
||||
|
||||
} // namespace ip
|
||||
|
|
|
@ -36,7 +36,10 @@ bool AxisCache::check() {
|
|||
}
|
||||
|
||||
for (size_t i = 1; i < registerNum; i++) {
|
||||
buf = getRegister(i);
|
||||
if (!getRegister(i, buf)) {
|
||||
logger->error("Failed to read register {}", i);
|
||||
return false;
|
||||
}
|
||||
if (buf != 0x00FF00FF) {
|
||||
logger->error("Register {}: 0x{:08x} != 0x{:08x}", i, buf, i);
|
||||
return false;
|
||||
|
@ -47,7 +50,11 @@ bool AxisCache::check() {
|
|||
resetAllRegisters();
|
||||
|
||||
for (size_t i = 0; i < registerNum; i++) {
|
||||
logger->debug("Register {}: 0x{:08x}", i, getRegister(i));
|
||||
if (!getRegister(i, buf)) {
|
||||
logger->error("Failed to read register {}", i);
|
||||
return false;
|
||||
}
|
||||
logger->debug("Register {}: 0x{:08x}", i, buf);
|
||||
}
|
||||
|
||||
return true;
|
||||
|
@ -58,28 +65,32 @@ void AxisCache::invalidate() {
|
|||
logger->info("invalidated AXIS cache.");
|
||||
}
|
||||
|
||||
void AxisCache::setRegister(size_t reg, uint32_t value) {
|
||||
bool AxisCache::setRegister(size_t reg, uint32_t value) {
|
||||
if (reg >= registerNum) {
|
||||
logger->error("Register index out of range: {}/{}", reg, registerNum);
|
||||
throw std::out_of_range("Register index out of range");
|
||||
return false;
|
||||
}
|
||||
Xil_Out32(getBaseAddr(registerMemory) + REGISTER_OUT(reg), value);
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t AxisCache::getRegister(size_t reg) {
|
||||
bool AxisCache::getRegister(size_t reg, uint32_t &value) {
|
||||
if (reg >= registerNum) {
|
||||
logger->error("Register index out of range: {}/{}", reg, registerNum);
|
||||
throw std::out_of_range("Register index out of range");
|
||||
return false;
|
||||
}
|
||||
return Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
|
||||
value = Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
|
||||
return true;
|
||||
}
|
||||
|
||||
void AxisCache::resetRegister(size_t reg) { setRegister(reg, 0); }
|
||||
bool AxisCache::resetRegister(size_t reg) { return setRegister(reg, 0); }
|
||||
|
||||
void AxisCache::resetAllRegisters() {
|
||||
bool AxisCache::resetAllRegisters() {
|
||||
bool result = true;
|
||||
for (size_t i = 1; i < registerNum; i++) {
|
||||
resetRegister(i);
|
||||
result &= resetRegister(i);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
AxisCache::~AxisCache() {}
|
||||
|
|
Loading…
Add table
Reference in a new issue