Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity

fpga: improve comments in register.cpp

Browse source 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
Niklas Eiling 2024-04-18 14:46:03 +02:00
parent 1a0c4a5ef0
commit da96f8b585
1 changed files with 6 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
fpga/lib/ips/register.cpp
View file

@ -43,9 +43,12 @@ bool Register::check() {
}
// This is Dino specific for now - we should possibly move this to Dino in the future
setRegister(0, static_cast<uint32_t>(1000)); // set Dino to a rate of 20 kHz
setRegister(1, -0.001615254F);
setRegister(2, 10.8061F);
constexpr double dinoClk = 25e9; // Dino is clocked with 25 Mhz
constexpr double sampleRate = 20e6; // We want to achieve a timestep of 50us
constexpr uint32_t dinoTimerVal = static_cast<uint32_t>(dinoClk / sampleRate);
setRegister(0, dinoTimerVal); // Timer value for generating ADC trigger signal
setRegister(1, -0.001615254F); // Scale factor for ADC value
setRegister(2, 10.8061F); // Offset for ADC value
uint32_t rate = getRegister(0);
float scale = getRegisterFloat(1);
float offset = getRegisterFloat(2);