mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
fpga: fix syntax errors
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
This commit is contained in:
parent
d3a9375e78
commit
de9bda4d74
2 changed files with 122 additions and 199 deletions
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@ -9,6 +9,7 @@
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#pragma once
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#include <villas/node/config.hpp>
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#include <villas/node.hpp>
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#include <villas/format.hpp>
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#include <villas/timing.hpp>
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@ -27,7 +28,10 @@ using namespace villas;
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#define FPGA_DMA_VLNV
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#define FPGA_AURORA_VLNV "acs.eonerc.rwth-aachen.de:user:aurora_axis:"
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struct fpga_node {
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class FpgaNode : public Node {
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protected:
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int irqFd;
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int coalesce;
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bool polling;
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@ -49,29 +53,38 @@ struct fpga_node {
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std::string cardName;
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std::string intfName;
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std::string dmaName;
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public:
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FpgaNode();
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virtual ~FpgaNode();
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static int
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typeStart(node::SuperNode *sn);
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static int
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typeStop();
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virtual int
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parse(json_t *cfg);
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virtual char *
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print();
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virtual int
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check();
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virtual int
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prepare();
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virtual int
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read(struct sample *smps[], unsigned cnt, unsigned *release);
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virtual int
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write(struct sample *smps[], unsigned cnt, unsigned *release);
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virtual int
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pollFDs(int fds[]);
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};
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int fpga_type_start(SuperNode *sn);
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int fpga_type_stop();
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int fpga_init(NodeCompat *n);
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int fpga_destroy(NodeCompat *n);
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int fpga_parse(NodeCompat *n, json_t *json);
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char * fpga_print(NodeCompat *n);
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int fpga_check(NodeCompat *n);
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int fpga_prepare(NodeCompat *n);
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int fpga_write(NodeCompat *n, struct Sample * const smps[], unsigned cnt);
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int fpga_read(NodeCompat *n, struct Sample * const smps[], unsigned cnt);
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int fpga_poll_fds(NodeCompat *n, int fds[]);
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} /* namespace node */
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} /* namespace villas */
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@ -20,20 +20,22 @@
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#include <villas/sample.hpp>
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#include <villas/super_node.hpp>
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#include <villas/fpga/pcie_card.hpp>
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#include <villas/fpga/core.hpp>
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#include <villas/fpga/vlnv.hpp>
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#include <villas/fpga/ips/dma.hpp>
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using namespace villas;
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using namespace villas::node;
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using namespace villas::fpga;
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using namespace villas::utils;
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/* Forward declartions */
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static struct NodeCompatType p;
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/* Global state */
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static fpga::PCIeCard::List cards;
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static std::map<fpga::ip::Dma, struct fpga_node *> dmaMap;
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static fpga::Card::List cards;
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static std::map<fpga::ip::Dma, struct fpga *> dmaMap;
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static std::shared_ptr<kernel::pci::DeviceList> pciDevices;
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static std::shared_ptr<kernel::vfio::Container> vfioContainer;
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@ -41,7 +43,17 @@ static std::shared_ptr<kernel::vfio::Container> vfioContainer;
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using namespace villas;
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using namespace villas::node;
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int villas::node::fpga_type_start(SuperNode *sn)
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FpgaNode::FpgaNode(struct vnode *n) :
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Node(n),
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irqFd(-1),
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coalesce(0),
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polling(true)
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{ }
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FpgaNode::~FpgaNode()
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{ }
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int FpgaNode::typeStart(node::SuperNode *sn)
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{
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vfioContainer = kernel::vfio::Container::create();
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pciDevices = std::make_shared<kernel::pci::DeviceList>();
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@ -51,250 +63,167 @@ int villas::node::fpga_type_start(SuperNode *sn)
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if (!pcieCardPlugin)
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throw RuntimeError("No FPGA PCIe plugin found");
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json_t *json = sn->getConfig();
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json_t *fpgas = json_object_get(json, "fpgas");
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if (!fpgas)
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json_t *json_cfg = sn->getConfig();
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json_t *json_fpgas = json_object_get(json_cfg, "fpgas");
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if (!json_fpgas)
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throw ConfigError(json, "node-config-fpgas", "No section 'fpgas' found in config");
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// create all FPGA card instances using the corresponding plugin
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auto pcieCards = pcieCardPlugin->make(fpgas, pciDevices, vfioContainer);
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auto cards = CardFactory::make(json_fpgas, pciDevices, vfioContainer);
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cards.splice(cards.end(), pcieCards);
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cards.splice(cards.end(), cards);
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return 0;
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}
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int villas::node::fpga_type_stop()
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int FpgaNode::typeStop()
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{
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vfioContainer.reset(); // TODO: is this the proper way?
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return 0;
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}
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int villas::node::fpga_init(NodeCompat *n)
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{
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auto *f = n->getData<struct fpga_node>();
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f->coalesce = 0;
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f->irqFd = -1;
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f->polling = true;
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new (&f->cardName) std::string();
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new (&f->dmaName) std::string();
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new (&f->intfName) std::string();
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new (&f->card) std::shared_ptr<fpga::PCIeCard>();
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new (&f->dma) std::shared_ptr<fpga::ip::Node>();
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new (&f->intf) std::shared_ptr<fpga::ip::Node>();
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new (&f->in.block) std::unique_ptr<MemoryBlock>();
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new (&f->out.block) std::unique_ptr<MemoryBlock>();
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return 0;
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}
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int villas::node::fpga_destroy(NodeCompat *n)
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{
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auto *f = n->getData<struct fpga_node>();
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// using maiptr = MemoryAccessor<uint32_t>;
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// using mafptr = MemoryAccessor<float>;
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using mbptr = MemoryBlock::Ptr;
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using cptr = std::shared_ptr<fpga::PCIeCard>;
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using nptr = std::shared_ptr<fpga::ip::Node>;
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using dptr = std::shared_ptr<fpga::ip::Dma>;
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using sptr = std::string;
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f->cardName.~sptr();
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f->dmaName.~sptr();
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f->intfName.~sptr();
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f->card.~cptr();
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f->dma.~dptr();
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f->intf.~nptr();
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f->in.block.~mbptr();
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f->out.block.~mbptr();
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return 0;
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}
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int villas::node::fpga_parse(NodeCompat *n, json_t *json)
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int FpgaNode::parse(json_t *cfg)
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{
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int ret;
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auto *f = n->getData<struct fpga_node>();
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json_error_t err;
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const char *card = nullptr;
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const char *intf = nullptr;
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const char *dma = nullptr;
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int polling = f->polling;
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int poll = polling;
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ret = json_unpack_ex(json, &err, 0, "{ s?: s, s?: s, s?: s, s?: i, s?: b }",
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"card", &card,
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"interface", &intf,
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"dma", &dma,
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"coalesce", &f->coalesce,
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"coalesce", &coalesce,
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"polling", &polling
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);
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if (ret)
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throw ConfigError(json, err, "node-config-node-fpga");
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throw ConfigError(cfg, err, "node-config-fpga", "Failed to parse configuration of node {}", node_name(node));
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if (card)
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f->cardName = card;
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cardName = card;
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if (intf)
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f->intfName = intf;
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intfName = intf;
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if (dma)
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f->dmaName = dma;
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dmaName = dma;
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f->polling = polling; // cast int to bool
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polling = poll; // cast int to bool
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return 0;
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}
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char * villas::node::fpga_print(NodeCompat *n)
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char * FpgaNode::print()
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{
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auto *f = n->getData<struct fpga_node>();
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auto &cardName = card ? card->name : cardName;
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return strf("fpga=%s, dma=%s, if=%s, polling=%s, coalesce=%d",
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f->card->name.c_str(),
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f->dma->getInstanceName().c_str(),
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f->polling ? "yes" : "no",
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f->coalesce
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cardName.c_str(),
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dma->getInstanceName().c_str(),
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polling ? "yes" : "no",
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coalesce
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);
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}
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int villas::node::fpga_prepare(NodeCompat *n)
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int FpgaNode::check()
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{
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return 0;
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}
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int FpgaNode::prepare()
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{
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int ret;
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auto *f = n->getData<struct fpga_node>();
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// Select first FPGA card
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auto it = f->cardName.empty()
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auto it = cardName.empty()
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? cards.begin()
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: std::find_if(cards.begin(), cards.end(), [f](const fpga::PCIeCard::Ptr &c) {
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return c->name == f->cardName;
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: std::find_if(cards.begin(), cards.end(), [this](const fpga::Card::Ptr &c) {
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return c->name == cardName;
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});
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if (it == cards.end())
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throw ConfigError(json_object_get(n->getConfig(), "fpga"), "node-config-node-fpga-card", "Invalid FPGA card name: {}", f->cardName);
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throw ConfigError(json_object_get(cfg, "fpga"), "node-config-fpga-card", "Invalid FPGA card name: {}", cardName);
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f->card = *it;
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card = *it;
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// Select interface IP core
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auto intf = f->intfName.empty()
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? f->card->lookupIp(fpga::Vlnv(FPGA_AURORA_VLNV))
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: f->card->lookupIp(f->intfName);
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auto intf = intfName.empty()
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? card->lookupIp(fpga::Vlnv(FPGA_AURORA_VLNV))
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: card->lookupIp(intfName);
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if (!intf)
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throw ConfigError(n->getConfig(), "node-config-node-fpga-interface", "There is no interface IP with the name: {}", f->intfName);
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throw ConfigError(cfg, "node-config-fpga-interface", "There is no interface IP with the name: {}", intfName);
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f->intf = std::dynamic_pointer_cast<fpga::ip::Node>(intf);
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if (!f->intf)
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intf = std::dynamic_pointer_cast<fpga::ip::Node>(intf);
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if (!intf)
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throw RuntimeError("The IP {} is not a interface", *intf);
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// Select DMA IP core
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auto dma = f->dmaName.empty()
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? f->card->lookupIp(fpga::Vlnv(FPGA_DMA_VLNV))
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: f->card->lookupIp(f->dmaName);
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auto dma = dmaName.empty()
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? card->lookupIp(fpga::Vlnv(FPGA_DMA_VLNV))
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: card->lookupIp(dmaName);
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if (!dma)
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throw ConfigError(n->getConfig(), "node-config-node-fpga-dma", "There is no DMA IP with the name: {}", f->dmaName);
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throw ConfigError(cfg, "node-config-fpga-dma", "There is no DMA IP with the name: {}", dmaName);
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f->dma = std::dynamic_pointer_cast<fpga::ip::Dma>(dma);
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if (!f->dma)
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dma = std::dynamic_pointer_cast<fpga::ip::Dma>(dma);
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if (!dma)
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throw RuntimeError("The IP {} is not a DMA controller", *dma);
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ret = f->intf->connect(*(f->dma), true);
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ret = intf->connect(*(dma), true);
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if (ret)
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throw RuntimeError("Failed to connect: {} -> {}",
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*(f->intf), *(f->dma)
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*(intf), *(dma)
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);
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auto &alloc = HostDmaRam::getAllocator();
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f->in.block = std::move(alloc.allocateBlock(0x100 / sizeof(int32_t)));
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f->out.block = std::move(alloc.allocateBlock(0x100 / sizeof(int32_t)));
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in.mem = alloc.allocate<uint32_t>(0x100 / sizeof(int32_t));
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out.mem = alloc.allocate<uint32_t>(0x100 / sizeof(int32_t));
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f->in.accessor.i = MemoryAccessor<int32_t>(*f->in.block);
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f->in.accessor.f = MemoryAccessor<float>(*f->in.block);
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in.block = in.mem.getMemoryBlock();
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out.block = out.mem.getMemoryBlock();
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f->out.accessor.i = MemoryAccessor<int32_t>(*f->out.block);
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f->out.accessor.f = MemoryAccessor<float>(*f->out.block);
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dma->makeAccesibleFromVA(in.block);
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dma->makeAccesibleFromVA(out.block);
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f->dma->makeAccesibleFromVA(*f->in.block);
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f->dma->makeAccesibleFromVA(*f->out.block);
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f->dma->dump();
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f->intf->dump();
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dma->dump();
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intf->dump();
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MemoryManager::get().getGraph().dump();
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return 0;
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}
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int villas::node::fpga_read(NodeCompat *n, struct Sample * const smps[], unsigned cnt)
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int FpgaNode::read(struct sample *smps[], unsigned cnt, unsigned *release)
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{
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unsigned read;
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auto *f = n->getData<struct fpga_node>();
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struct Sample *smp = smps[0];
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struct sample *smp = smps[0];
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assert(cnt == 1);
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f->dma->read(*f->in.block.get(), f->in.block->getSize()); // TODO: calc size
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const size_t bytesRead = f->dma->readComplete();
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dma->read(in.block, in.block.getSize()); // TODO: calc size
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const size_t bytesRead = dma->readComplete();
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read = bytesRead / sizeof(int32_t);
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for (unsigned i = 0; i < MIN(read, smp->capacity); i++) {
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auto sig = n->getInputSignals(false)->getByIndex(i);
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for (unsigned i = 0; i < MIN(read, smp->capacity); i++)
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smp->data[i].i = in.mem[i];
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switch (sig->type) {
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case SignalType::INTEGER:
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smp->data[i].i = f->in.accessor.i[i];
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break;
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case SignalType::FLOAT:
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smp->data[i].f = f->in.accessor.f[i];
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break;
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default: {}
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}
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}
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smp->signals = n->getInputSignals(false);
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smp->length = bytesRead / sizeof(uint32_t);
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smp->flags = (int) SampleFlags::HAS_DATA;
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smp->signals = &node->in.signals;
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return read;
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}
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int villas::node::fpga_write(NodeCompat *n, struct Sample * const smps[], unsigned cnt)
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int FpgaNode::write(struct sample *smps[], unsigned cnt, unsigned *release)
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{
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int written;
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auto *f = n->getData<struct fpga_node>();
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struct Sample *smp = smps[0];
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struct sample *smp = smps[0];
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assert(cnt == 1);
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for (unsigned i = 0; i < smps[0]->length; i++) {
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auto sig = smp->signals->getByIndex(i);
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for (unsigned i = 0; i < smps[0]->length; i++)
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out.mem[i] = smps[0]->data[i].i;
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switch (sig->type) {
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case SignalType::INTEGER:
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f->out.accessor.i[i] = smps[0]->data[i].i;
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break;
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case SignalType::FLOAT:
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f->out.accessor.f[i] = smps[0]->data[i].f;
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break;
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default: {}
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}
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}
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bool state = f->dma->write(*f->out.block.get(), smp->length * sizeof(int32_t));
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bool state = dma->write(out.block, smp->length * sizeof(int32_t));
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if (!state)
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return -1;
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@ -303,36 +232,17 @@ int villas::node::fpga_write(NodeCompat *n, struct Sample * const smps[], unsign
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return written;
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}
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int villas::node::fpga_poll_fds(NodeCompat *n, int fds[])
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int FpgaNode::pollFDs(int fds[])
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{
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auto *f = n->getData<struct fpga_node>();
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if (f->polling)
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if (polling)
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return 0;
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else {
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fds[0] = f->irqFd;
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fds[0] = irqFd;
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return 1; /* The number of file descriptors which have been set in fds */
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}
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}
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__attribute__((constructor(110)))
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static void register_plugin() {
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p.name = "fpga";
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p.description = "Communicate with VILLASfpga Xilinx FPGA boards";
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p.vectorize = 1;
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p.size = sizeof(struct fpga_node);
|
||||
p.type.start = fpga_type_start;
|
||||
p.type.stop = fpga_type_stop;
|
||||
p.init = fpga_init;
|
||||
p.destroy = fpga_destroy;
|
||||
p.prepare = fpga_prepare;
|
||||
p.parse = fpga_parse;
|
||||
p.print = fpga_print;
|
||||
p.read = fpga_read;
|
||||
p.write = fpga_write;
|
||||
p.poll_fds = fpga_poll_fds;
|
||||
|
||||
static NodeCompatFactory ncp(&p);
|
||||
}
|
||||
|
||||
static char n[] = "fpga";
|
||||
static char d[] = "VILLASfpga";
|
||||
static NodePlugin<FpgaNode, n , d, (int) NodeFactory::Flags::SUPPORTS_READ | (int) NodeFactory::Flags::SUPPORTS_WRITE | (int) NodeFactory::Flags::SUPPORTS_POLL> p;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue