mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
added LAPACK based benchmark
This commit is contained in:
parent
fcd07748dd
commit
eb7391a4a3
2 changed files with 268 additions and 137 deletions
2
Makefile
2
Makefile
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@ -110,7 +110,7 @@ LIB_LDLIBS += $(shell pkg-config --libs ${PKGS})
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all: $(LIBS) $(TARGETS) models
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# Dependencies for individual binaries
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fpga: LDLIBS += -lpci -lxil
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fpga: LDLIBS += -lpci -lxil -lblas -llapack
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node: server.o
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fpga: fpga-main.o fpga-tests.o fpga-bench.o
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403
src/fpga-bench.c
403
src/fpga-bench.c
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@ -13,8 +13,8 @@
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#include <sys/utsname.h>
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#include <villas/utils.h>
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#include <villas/hist.h>
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#include <villas/log.h>
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#include <villas/timing.h>
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#include <villas/nodes/fpga.h>
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#include <villas/fpga/intc.h>
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#include <villas/fpga/ip.h>
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@ -24,22 +24,26 @@
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#include "config.h"
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#include "config-fpga.h"
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#define BENCH_EXP_MIN 2 // 1 << 2 = 4 Bytes
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#define BENCH_EXP_MAX 17 // 1 << 17 = 128 MiB
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/* Some hard-coded configuration for the benchmarks */
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#define BENCH_ROUNDS 10000
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#define BENCH_WARMUP 2000
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#define BENCH_DM 3
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// 1 FIFO
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// 2 DMA SG
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// 3 DMA Simple
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#define BENCH_RUNS 3000000
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#define BENCH_WARMUP 100
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#define BENCH_DM_EXP_MIN 0
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#define BENCH_DM_EXP_MAX 20
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int fpga_benchmark_datamover(struct fpga *f);
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int fpga_benchmark_jitter(struct fpga *f);
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int fpga_benchmark_memcpy(struct fpga *f);
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int fpga_benchmark_overflows(struct fpga *f);
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int fpga_benchmark_overruns(struct fpga *f);
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int fpga_benchmark_latency(struct fpga *f);
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enum { POLLING, IRQ } mode;
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enum { READ, WRITE } rw = READ;
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struct utsname uts;
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static int intc_flags = 0;
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static struct utsname uts;
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int fpga_benchmarks(int argc, char *argv[], struct fpga *f)
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{
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@ -51,7 +55,7 @@ int fpga_benchmarks(int argc, char *argv[], struct fpga *f)
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{ "datamover", fpga_benchmark_datamover },
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{ "jitter", fpga_benchmark_jitter },
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{ "memcpy", fpga_benchmark_memcpy },
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{ "overflows", fpga_benchmark_overflows },
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{ "overruns", fpga_benchmark_overruns },
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{ "latency", fpga_benchmark_latency }
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};
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@ -73,80 +77,151 @@ int fpga_benchmarks(int argc, char *argv[], struct fpga *f)
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if (ret)
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return -1;
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for (int j = 0; j < 2; j++) {
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mode = j;
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again: ret = bench->func(f);
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if (ret)
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error("Benchmark %s failed", bench->name);
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ret = bench->func(f);
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if (ret)
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error("Benchmark %s failed", bench->name);
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/* Rerun test with polling */
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if (intc_flags == 0) {
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intc_flags |= INTC_POLLING;
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getchar();
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goto again;
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}
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return -1;
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}
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int fpga_benchmark_overflows(struct fpga *f)
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{
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struct ip *tmr;
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extern int dgemm_(char *transa, char *transb, int *m, int *n, int *k, double *alpha, double *a, int *lda, double *b, int *ldb, double *beta, double *c, int *ldc);
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extern int dgetrf_(int *m, int *n, double *a, int *lda, int *ipiv, int *info);
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extern int dgetri_(int *n, double *a, int *lda, int *ipiv, double *work, int *lwork, int *info);
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tmr = list_lookup(&f->ips, "timer_0");
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if (!tmr || !f->intc)
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static int lapack_generate_workload(int N, double *C)
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{
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double *A = alloc(N * N * sizeof(double));
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srand(time(NULL));
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for (int i = 0; i < N * N; i++)
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A[i] = 100 * (double) rand() / RAND_MAX + 1;
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char transA = 'T';
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char transB = 'N';
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double alpha = 1;
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double beta = 1;
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/* C = A' * A, to get an invertible matrix */
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dgemm_(&transA, &transB, &N, &N, &N, &alpha, A, &N, A, &N, &beta, C, &N);
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free(A);
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return 0;
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}
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static int lapack_workload(int N, double *A)
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{
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int info = 0;
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int lworkspace = N;
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int ipiv[N];
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double workspace[N];
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dgetrf_(&N, &N, A, &N, ipiv, &info);
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if (info > 0)
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error("Failed to pivot matrix");
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dgetri_(&N, A, &N, ipiv, workspace, &lworkspace, &info);
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if (info > 0)
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error("Failed to LU factorized matrix");
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return 0;
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}
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int fpga_benchmark_overruns(struct fpga *f)
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{
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struct ip *rtds, *dm;
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dm = list_lookup(&f->ips, "dma_1");
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rtds = list_lookup(&f->ips, "rtds_axis_0");
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if (!rtds || !f->intc)
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return -1;
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XTmrCtr *xtmr = &tmr->timer.inst;
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if (mode == IRQ)
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intc_enable(f->intc, (1 << tmr->irq), 0);
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int ret;
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float period = 50e-6;
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int times = period * 1.5 * 1e6; // in uS
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int runs = 1.0 / period;
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int overflows[times];
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int overruns;
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info("runs = %u", runs);
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XTmrCtr_SetOptions(xtmr, 0, XTC_INT_MODE_OPTION | XTC_EXT_COMPARE_OPTION | XTC_DOWN_COUNT_OPTION | XTC_AUTO_RELOAD_OPTION);
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XTmrCtr_SetResetValue(xtmr, 0, period * AXI_HZ);
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XTmrCtr_Start(xtmr, 0);
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switch_connect(f->sw, dm, rtds);
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switch_connect(f->sw, rtds, dm);
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for (int p = 0; p < times; p++) {
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overflows[p] = 0;
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for (int i = 0; i < runs; i++) {
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uint32_t tcsr;
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if ((tcsr = XTmrCtr_ReadReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET)) & XTC_CSR_INT_OCCURED_MASK)
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overflows[p]++;
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if (mode == IRQ)
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intc_wait(f->intc, tmr->irq, 0);
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else {
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while (!((tcsr = XTmrCtr_ReadReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET)) & XTC_CSR_INT_OCCURED_MASK)) __asm__("nop");
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}
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tcsr = XTmrCtr_ReadReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET);
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XTmrCtr_WriteReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET, tcsr);
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/* Processing */
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rdtsc_sleep(p * 1000, 0);
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}
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}
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XTmrCtr_Stop(xtmr, 0);
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intc_enable(f->intc, (1 << (dm->irq + 1 )), intc_flags);
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/* Dump results */
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char fn[256];
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snprintf(fn, sizeof(fn), "results/overflows_%s_%s.dat", mode == IRQ ? "irq" : "polling", uts.release);
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snprintf(fn, sizeof(fn), "results/overruns_lu_rtds_axis_%s_%s.dat", intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
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FILE *g = fopen(fn, "w");
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fprintf(g, "# period = %f\n", period);
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fprintf(g, "# runs = %u\n", runs);
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for (int i = 0; i < times; i++)
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fprintf(g, "%u\n", overflows[i]);
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fclose(g);
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if (mode == IRQ)
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intc_disable(f->intc, (1 << tmr->irq));
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struct dma_mem mem;
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ret = dma_alloc(dm, &mem, 0x1000, 0);
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if (ret)
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error("Failed to allocate DMA memory");
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uint32_t *data_rx = (uint32_t *) mem.base_virt;
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uint32_t *data_tx = (uint32_t *) mem.base_virt + 0x200;
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uint64_t total, start, stop;
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for (int p = 3; p < 45; p++) {
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double *A = alloc(p*p*sizeof(double));
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lapack_generate_workload(p, A);
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overruns = 0;
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total = 0;
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for (int i = 0; i < 2000; i++) {
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dma_read(dm, mem.base_phys, 0x200);
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dma_read_complete(dm, NULL, NULL);
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}
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for (int i = 0; i < runs + BENCH_WARMUP; i++) {
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dma_read(dm, mem.base_phys, 0x200);
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start = rdtscp();
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lapack_workload(p, A);
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stop = rdtscp();
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dma_read_complete(dm, NULL, NULL);
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/* Send data to rtds */
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data_tx[0] = i;
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dma_write(dm, mem.base_phys + 0x200, 64 * sizeof(data_tx[0]));
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if (i < BENCH_WARMUP)
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continue;
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if (i - data_rx[0] > 2)
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overruns++;
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total += stop - start;
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}
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free(A);
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info("iter = %u clks = %ju overruns = %u", p, total / runs, overruns);
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fprintf(g, "%u %ju %u\n", p, total / runs, overruns);
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if (overruns >= runs)
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break;
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}
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fclose(g);
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return 0;
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}
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int fpga_benchmark_jitter(struct fpga *f)
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{
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int ret;
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struct ip *tmr;
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tmr = list_lookup(&f->ips, "timer_0");
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@ -155,13 +230,14 @@ int fpga_benchmark_jitter(struct fpga *f)
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XTmrCtr *xtmr = &tmr->timer.inst;
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if (mode == IRQ)
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intc_enable(f->intc, (1 << tmr->irq), 0);
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ret = intc_enable(f->intc, (1 << tmr->irq), intc_flags);
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if (ret)
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error("Failed to enable interrupt");
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float period = 50e-6;
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int runs = 300.0 / period;
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int *hist = (int *) f->dma;
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int *hist = alloc(8 << 20);
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XTmrCtr_SetOptions(xtmr, 0, XTC_INT_MODE_OPTION | XTC_EXT_COMPARE_OPTION | XTC_DOWN_COUNT_OPTION | XTC_AUTO_RELOAD_OPTION);
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XTmrCtr_SetResetValue(xtmr, 0, period * AXI_HZ);
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@ -169,16 +245,12 @@ int fpga_benchmark_jitter(struct fpga *f)
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uint64_t end, start = rdtscp();
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for (int i = 0; i < runs; i++) {
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if (mode == IRQ) {
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uint64_t cnt = intc_wait(f->intc, tmr->irq, 0);
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if (cnt != 1)
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warn("fail");
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}
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else {
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uint32_t tcsr;
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while (!((tcsr = XTmrCtr_ReadReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET)) & XTC_CSR_INT_OCCURED_MASK)) __asm__("nop");
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XTmrCtr_WriteReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET, tcsr | XTC_CSR_INT_OCCURED_MASK);
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}
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uint64_t cnt = intc_wait(f->intc, tmr->irq);
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if (cnt != 1)
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warn("fail");
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/* Ackowledge IRQ */
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XTmrCtr_WriteReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET, XTmrCtr_ReadReg((uintptr_t) f->map + tmr->baseaddr, 0, XTC_TCSR_OFFSET));
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end = rdtscp();
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hist[i] = end - start;
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@ -188,7 +260,7 @@ int fpga_benchmark_jitter(struct fpga *f)
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XTmrCtr_Stop(xtmr, 0);
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char fn[256];
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snprintf(fn, sizeof(fn), "results/jitter_%s_%s.dat", mode == IRQ ? "irq" : "polling", uts.release);
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snprintf(fn, sizeof(fn), "results/jitter_%s_%s.dat", intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
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FILE *g = fopen(fn, "w");
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for (int i = 0; i < runs; i++)
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fprintf(g, "%u\n", hist[i]);
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@ -196,13 +268,17 @@ int fpga_benchmark_jitter(struct fpga *f)
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free(hist);
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if (mode == IRQ)
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intc_disable(f->intc, (1 << tmr->irq));
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ret = intc_disable(f->intc, (1 << tmr->irq));
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if (ret)
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error("Failed to disable interrupt");
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return 0;
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}
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int fpga_benchmark_latency(struct fpga *f)
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{
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int ret;
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uint64_t start, end;
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if (!f->intc)
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@ -211,119 +287,174 @@ int fpga_benchmark_latency(struct fpga *f)
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int runs = 1000000;
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int hist[runs];
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intc_enable(f->intc, 0x100, mode == POLLING ? 1 : 0);
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ret = intc_enable(f->intc, 0x100, intc_flags);
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if (ret)
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error("Failed to enable interrupts");
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for (int i = 0; i < runs; i++) {
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start = rdtscp();
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XIntc_Out32((uintptr_t) f->map + f->intc->baseaddr + XIN_ISR_OFFSET, 0x100);
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intc_wait(f->intc, 8, mode == POLLING ? 1 : 0);
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intc_wait(f->intc, 8);
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end = rdtscp();
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hist[i] = end - start;
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}
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char fn[256];
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snprintf(fn, sizeof(fn), "results/latency_%s_%s.dat", mode == IRQ ? "irq" : "polling", uts.release);
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snprintf(fn, sizeof(fn), "results/latency_%s_%s.dat", intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
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FILE *g = fopen(fn, "w");
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for (int i = 0; i < runs; i++)
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fprintf(g, "%u\n", hist[i]);
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fclose(g);
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intc_disable(f->intc, 0x100);
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ret = intc_disable(f->intc, 0x100);
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if (ret)
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error("Failed to disable interrupt");
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return 0;
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}
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int fpga_benchmark_datamover(struct fpga *f)
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{
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#if 0
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uint64_t start, stop;
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int ret;
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char *src, *dst;
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size_t len;
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struct ip *dm;
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struct dma_mem mem, src, dst;
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for (int exp = BENCH_EXP_MIN; exp < BENCH_EXP_MAX; exp++) {
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size_t sz = 1 << exp;
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#if BENCH_DM == 1
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char *dm_name = "fifo_mm_s_0";
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#elif BENCH_DM == 2
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char *dm_name = "dma_0";
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#elif BENCH_DM == 3
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char *dm_name = "dma_1";
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#endif
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dm = list_lookup(&f->ips, dm_name);
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if (!dm)
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error("Unknown datamover");
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read_random(src, len);
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memset(dst, 0, len);
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ret = switch_connect(f->sw, dm, dm);
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if (ret)
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error("Failed to configure switch");
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ret = intc_enable(f->intc, (1 << dm->irq) | (1 << (dm->irq + 1)), intc_flags);
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if (ret)
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error("Failed to enable interrupt");
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info("Running bench with size: %#zx", sz);
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/* Allocate DMA memory */
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ret = dma_alloc(dm, &mem, 2 * (1 << BENCH_DM_EXP_MAX), 0);
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if (ret)
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error("Failed to allocate DMA memory");
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for (int i = 0; i < BENCH_ROUNDS + BENCH_WARMUP; i++) {
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ret = dma_mem_split(&mem, &src, &dst);
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if (ret)
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return -1;
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/* Open file for results */
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char fn[256];
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snprintf(fn, sizeof(fn), "results/datamover_%s_%s_%s.dat", dm_name, intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
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FILE *g = fopen(fn, "w");
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for (int exp = BENCH_DM_EXP_MIN; exp <= BENCH_DM_EXP_MAX; exp++) {
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uint64_t start, stop, total = 0, len = 1 << exp;
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#if BENCH_DM == 1
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if (exp > 11)
|
||||
break; /* FIFO and Simple DMA are limited to 4kb */
|
||||
#elif BENCH_DM == 3
|
||||
if (exp >= 12)
|
||||
break; /* FIFO and Simple DMA are limited to 4kb */
|
||||
#endif
|
||||
|
||||
read_random(src.base_virt, len);
|
||||
memset(dst.base_virt, 0, len);
|
||||
|
||||
info("Start DM bench: len=%#jx", len);
|
||||
|
||||
uint64_t runs = BENCH_RUNS >> exp;
|
||||
for (int i = 0; i < runs + BENCH_WARMUP; i++) {
|
||||
start = rdtscp();
|
||||
#if BENCH_DM == 1
|
||||
ssize_t ret;
|
||||
|
||||
switch (bench) {
|
||||
case BENCH_FIFO:
|
||||
fifo_write(&f->fifo, src, len, irq_fifo);
|
||||
fifo_read(&f->fifo, src, len, irq_fifo);
|
||||
break;
|
||||
case BENCH_DMA_SG:
|
||||
dma_write(&f->dma_sg, src, len, irq_dma_mm2s);
|
||||
dma_read(&f->dma_sg, src, len, irq_dma_s2mm);
|
||||
break;
|
||||
case BENCH_DMA_SIMPLE:
|
||||
dma_write(&f->dma_simple, src, len, irq_dma_mm2s);
|
||||
dma_read(&f->dma_simple, src, len, irq_dma_s2mm);
|
||||
break;
|
||||
}
|
||||
ret = fifo_write(dm, src.base_virt, len);
|
||||
if (ret < 0)
|
||||
error("Failed write to FIFO with len = %zu", len);
|
||||
|
||||
ret = fifo_read(dm, dst.base_virt, dst.len);
|
||||
if (ret < 0)
|
||||
error("Failed read from FIFO with len = %zu", len);
|
||||
#else
|
||||
ret = dma_ping_pong(dm, src.base_phys, dst.base_phys, len);
|
||||
if (ret)
|
||||
error("DMA ping pong failed");
|
||||
#endif
|
||||
stop = rdtscp();
|
||||
|
||||
if (memcmp(src, dst, len))
|
||||
if (memcmp(src.base_virt, dst.base_virt, len))
|
||||
warn("Compare failed");
|
||||
|
||||
if (i > BENCH_WARMUP)
|
||||
hist_put(&hist, stop - start);
|
||||
total += stop - start;
|
||||
}
|
||||
|
||||
info("exp %u avg %lu", exp, total / runs);
|
||||
fprintf(g, "%lu %lu\n", len, total / runs);
|
||||
}
|
||||
#endif
|
||||
|
||||
fclose(g);
|
||||
|
||||
ret = switch_disconnect(f->sw, dm, dm);
|
||||
if (ret)
|
||||
error("Failed to configure switch");
|
||||
|
||||
ret = dma_free(dm, &mem);
|
||||
if (ret)
|
||||
error("Failed to release DMA memory");
|
||||
|
||||
ret = intc_disable(f->intc, (1 << dm->irq) | (1 << (dm->irq + 1)));
|
||||
if (ret)
|
||||
error("Failed to enable interrupt");
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int fpga_benchmark_memcpy(struct fpga *f)
|
||||
{
|
||||
#if 1
|
||||
char *src = f->map;
|
||||
char *dst = alloc(1 << 16);
|
||||
#else
|
||||
char *dst = f->map;
|
||||
char *src = alloc(1 << 16);
|
||||
#endif
|
||||
char *map = f->map + 0x200000;
|
||||
uint32_t *mapi = (uint32_t *) map;
|
||||
|
||||
int runs = 10000;
|
||||
|
||||
char fn[256];
|
||||
snprintf(fn, sizeof(fn), "results/bar0_%s_%s.dat", mode == IRQ ? "irq" : "polling", uts.release);
|
||||
snprintf(fn, sizeof(fn), "results/bar0_%s_%s.dat", intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
|
||||
FILE *g = fopen(fn, "w");
|
||||
fprintf(g, "# runs = %u\n", runs);
|
||||
fprintf(g, "# bytes cycles\n");
|
||||
|
||||
size_t len = 1;
|
||||
for (int i = 0; i < 16; i++) {
|
||||
len = 1 << i;
|
||||
|
||||
uint32_t dummy = 0;
|
||||
|
||||
for (int exp = BENCH_DM_EXP_MIN; exp <= BENCH_DM_EXP_MAX; exp++) {
|
||||
uint64_t len = 1 << exp;
|
||||
uint64_t start, end, total = 0;
|
||||
for (int i = 0; i < runs; i++) {
|
||||
/* Clear cache */
|
||||
// for (char *p = src; p < src + len; p += 64)
|
||||
// __builtin_ia32_clflush(p);
|
||||
// for (char *p = dst; p < dst + len; p += 64)
|
||||
// __builtin_ia32_clflush(p);
|
||||
uint64_t runs = (BENCH_RUNS << 2) >> exp;
|
||||
|
||||
/* Start measurement */
|
||||
for (int i = 0; i < runs + BENCH_WARMUP; i++) {
|
||||
start = rdtscp();
|
||||
memcpy(dst, src, len);
|
||||
|
||||
for (int j = 0; j < len / 4; j++)
|
||||
// mapi[j] = j; // write
|
||||
dummy += mapi[j]; // read
|
||||
|
||||
end = rdtscp();
|
||||
|
||||
total += end - start;
|
||||
if (i > BENCH_WARMUP)
|
||||
total += end - start;
|
||||
}
|
||||
|
||||
fprintf(g, "%zu %lu\n", len, total / runs);
|
||||
usleep(100000);
|
||||
|
||||
info("exp = %u\truns = %ju\ttotal = %ju\tavg = %ju\tavgw = %ju", exp, runs, total, total / runs, total / (runs * len));
|
||||
fprintf(g, "%zu %lu %ju\n", len, total / runs, runs);
|
||||
}
|
||||
|
||||
|
||||
fclose(g);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue