mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
updated the configuration
This commit is contained in:
parent
05af02304d
commit
f413355d05
3 changed files with 94 additions and 37 deletions
5
config.h
5
config.h
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@ -20,7 +20,10 @@
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/** The version number of VILLASnode */
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#define VERSION "v0.5-" _GIT_REV
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/** Default number of values in a message */
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#define DEFAULT_PRIORITY 80
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#define DEFAULT_AFFINITY -1
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/** Default number of values in a sample */
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#define DEFAULT_VALUES 64
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#define DEFAULT_QUEUELEN 1024
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101
etc/fpga.conf
101
etc/fpga.conf
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@ -1,3 +1,8 @@
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affinity = 0xC;
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debug = 0;
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stats = 1;
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fpga = {
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/* Card identification */
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@ -20,14 +25,6 @@ fpga = {
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baseaddr = 0x0000;
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size = 0x2000;
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},
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xsg_multiply_0 = {
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vlnv = "acs.eonerc.rwth-aachen.de:sysgen:xsg_multiply:1.0";
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baseaddr = 0x2000;
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port = 4;
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parameters = {
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factor = 2.0;
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}
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},
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dma_0 = {
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vlnv = "xilinx.com:ip:axi_dma:7.1";
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baseaddr = 0x3000;
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@ -37,12 +34,12 @@ fpga = {
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timer_0 = {
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vlnv = "xilinx.com:ip:axi_timer:2.0";
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baseaddr = 0x4000;
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irq = 0; /* 0 - 1 */
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irq = 0;
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},
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switch_0 = {
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vlnv = "xilinx.com:ip:axis_interconnect:2.1"
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baseaddr = 0x5000;
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numports = 10;
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num_ports = 10;
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},
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fifo_mm_s_0 = {
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vlnv = "xilinx.com:ip:axi_fifo_mm_s:4.1";
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@ -54,29 +51,37 @@ fpga = {
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rtds_axis_0 = {
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vlnv = "acs.eonerc.rwth-aachen.de:user:rtds_axis:1.0";
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baseaddr = 0x8000;
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port = 5;
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port = 0;
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irq = 5; /* 5 -7 */
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},
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hls_multiply_0 = {
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vlnv = "acs.eonerc.rwth-aachen.de:hls:hls_multiply:1.1";
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baseaddr = 0x9000;
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port = 5;
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inputs = {
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in = "axis_interconnect:0"
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},
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outputs = {
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out = "axis_interconnect:0",
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};
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irqs = {
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ts = "axi_pcie_intc_0:5",
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ovfl = "axi_pcie_intc_0:6",
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case = "axi_pcie_intc_0:7",
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}
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},
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dma_1 = {
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vlnv = "xilinx.com:ip:axi_dma:7.1";
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baseaddr = 0xA000;
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port = 7;
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baseaddr = 0x2000;
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port = 6;
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irq = 3; /* 3 - 4 */
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},
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hls_decimate_0 = {
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vlnv = "acs.eonerc.rwth-aachen.de:hls:hls_decimate:1.0";
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baseaddr = 0xE000;
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port = 8;
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},
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hls_dft_0 = {
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vlnv = "acs.eonerc.rwth-aachen.de:hls:hls_dft:1.0";
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baseaddr = 0xF000;
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port = 9;
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baseaddr = 0x9000;
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port = 5;
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irq = 1;
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period = 400; /* in samples: 20ms / 50uS = 400*/
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harmonics = [ 0, 1, 3, 5, 7 ]
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decimation = 1; /* 0 = disabled */
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//harmonics = [ 0, 1, 2, 5, 22 ]
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},
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axis_data_fifo_0 = {
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vlnv = "xilinx.com:ip:axis_data_fifo:1.1";
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@ -90,8 +95,22 @@ fpga = {
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/* Configure switch */
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paths = (
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{ in = "dma", out = "hls_dft" },
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{ in = "hls_dft", out = "dma" }
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// DM Tests
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// { in = "fifo_mm_s_0", out = "fifo_mm_s_0" },
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// { in = "dma_1", out = "dma_1" },
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// { in = "dma_0", out = "dma_0" }
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// DFT <-> RTDS
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// { in = "rtds_axis_0", out = "hls_dft_0" },
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// { in = "hls_dft_0", out = "rtds_axis_0" }
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// Linux <-> RTDS
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// { in = "rtds_axis_0", out = "dma_1" },
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// { in = "dma_1", out = "rtds_axis_0" }
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// DFT <-> Linux
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{ in = "dma_0", out = "hls_dft_0" },
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{ in = "hls_dft_0", out = "dma_0" }
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)
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}
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@ -100,9 +119,31 @@ plugins = [
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]
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nodes = {
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dma = {
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dma_0 = {
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type = "fpga";
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datamover = "dma_0";
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use_irqs = false;
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},
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dma_1 = {
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type = "fpga";
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datamover = "dma_1";
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},
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fifo_0 = {
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type = "fpga";
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datamover = "fifo_mm_s_0";
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use_irqs = true
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},
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simple_circuit = {
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type = "cbuilder";
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model = "simple_circuit",
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timestep = 25e-6;
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parameters = [
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1.0, /**< R2 = 1 Ohm */
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0.001 /**< C2 = 1000 uF */
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];
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}
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}
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}
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paths = (
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// { in = "dma_1", out = "dma_1" },
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{ in = "dma_1", out = "simple_circuit", reverse = true }
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)
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25
lib/cfg.c
25
lib/cfg.c
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@ -26,12 +26,13 @@ int config_parse(const char *filename, config_t *cfg, struct settings *set,
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filename_cpy = strdup(filename);
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include_dir = dirname(filename_cpy);
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free(filename_cpy);
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/* Setup libconfig */
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config_set_auto_convert(cfg, 1);
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config_set_include_dir(cfg, include_dir);
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free(filename_cpy);
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ret = strcmp("-", filename) ? config_read_file(cfg, filename) : config_read(cfg, stdin);
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if (ret != CONFIG_TRUE) {
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error("Failed to parse configuration: %s in %s:%d",
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@ -80,8 +81,14 @@ int config_parse(const char *filename, config_t *cfg, struct settings *set,
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int config_parse_global(config_setting_t *cfg, struct settings *set)
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{
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config_setting_lookup_int(cfg, "affinity", &set->affinity);
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config_setting_lookup_int(cfg, "priority", &set->priority);
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config_setting_t *cfg_plugins;
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if (!config_setting_lookup_int(cfg, "affinity", &set->affinity))
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set->affinity = DEFAULT_AFFINITY;
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if (!config_setting_lookup_int(cfg, "priority", &set->priority))
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set->priority = DEFAULT_PRIORITY;
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config_setting_lookup_int(cfg, "debug", &set->debug);
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config_setting_lookup_float(cfg, "stats", &set->stats);
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@ -123,7 +130,10 @@ int config_parse_path(config_setting_t *cfg,
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path_init(p);
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/* Input node */
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if (!config_setting_lookup_string(cfg, "in", &in))
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if (!config_setting_lookup_string(cfg, "in", &in) &&
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!config_setting_lookup_string(cfg, "from", &in) &&
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!config_setting_lookup_string(cfg, "src", &in) &&
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!config_setting_lookup_string(cfg, "source", &in))
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cerror(cfg, "Missing input node for path");
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p->in = list_lookup(nodes, in);
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@ -131,8 +141,11 @@ int config_parse_path(config_setting_t *cfg,
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cerror(cfg, "Invalid input node '%s'", in);
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/* Output node(s) */
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cfg_out = config_setting_get_member(cfg, "out");
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if (!cfg_out)
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if (!(cfg_out = config_setting_get_member(cfg, "out")) &&
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!(cfg_out = config_setting_get_member(cfg, "to")) &&
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!(cfg_out = config_setting_get_member(cfg, "dst")) &&
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!(cfg_out = config_setting_get_member(cfg, "dest")) &&
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!(cfg_out = config_setting_get_member(cfg, "sink")))
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cerror(cfg, "Missing output nodes for path");
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ret = config_parse_nodelist(cfg_out, &p->destinations, nodes);
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