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fpga: fix example config

Signed-off-by: Steffen Vogel <post@steffenvogel.de>
This commit is contained in:
Steffen Vogel 2022-12-07 18:51:56 +01:00
parent 5398006734
commit fc1a38cac5

View file

@ -5,18 +5,12 @@ logging = {
fpgas = {
vc707 = {
# Card identification
id = "10ee:7022"
id = "10ee:7021"
# slot = "88:00.0"
do_reset = true
ips = {
"@import /global/projects/villas/fpga/software/etc/vc707-xbar-pcie/vc707-xbar-pcie.json"
axis_interconnect_0_xbar = {
}
}
ips = "/global/projects/villas/fpga/software/etc/vc707-xbar-pcie/vc707-xbar-pcie.json"
paths = (
{