3d73c759ea
Reformat all code with clang-format
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:34:27 +01:00
Niklas Eiling
d61337023e
add draft for i2c drvier implementation
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-13 15:17:26 +01:00
Niklas Eiling
c2176113d7
update libxil submodule
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-09-08 11:24:43 +02:00
Niklas Eiling
c84df46d9e
update libxil submodule, adding correct install path for libxil
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-07-25 17:36:01 +02:00
Steffen Vogel
62af43f25e
update libxil submodule
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Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
2023-01-11 09:40:23 +01:00
f776cba693
relicense project to Apache 2.0
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The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
c678fe36fc
update libxil submodule
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-05 14:21:20 +01:00
5fc556523c
add libxil as a submodule
2022-11-11 03:12:53 -05:00
5502d3577b
remove unused submodules
2020-08-17 17:21:18 +02:00
e5545aa17e
emc: add initial code to flash FPGA bitstream via PCIe
2020-07-08 17:16:43 +02:00
eabae63714
update submodules
2020-07-08 15:24:01 +02:00
c4fe7e4b07
update libxil submodule
2020-06-15 22:49:43 +02:00
de566d441d
move common code to VILLAScommon submodule
2018-08-21 01:14:18 +02:00
Daniel Krebs
ff20f624a6
thirdparty: add CLI11 and rang header-only libraries
2018-06-04 14:20:06 +02:00
Daniel Krebs
1b2e7d312e
common/memory: add host DMA memory allocator using udmabuf
2018-05-15 18:04:24 +02:00
Daniel Krebs
10745f00b5
libxil: update submodule
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Only add temporary files to gitignore
2018-02-13 16:15:28 +01:00
Daniel Krebs
aa33a8e028
libxil: update upstream path
2018-01-30 15:10:25 +01:00
daniel-k
28a7f2a3ee
spdlog: fix handling of too long logger names
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`whitespace` overflows because the result implicitly is an unsigned
value.
2018-01-23 10:09:06 +01:00
daniel-k
f2a5e7af22
spdlog: patch name formatter to implement fixed width names in format
2018-01-10 15:42:03 +01:00
daniel-k
b33b4d27d9
Merge commit '2cfd26b6ee2696a0e23b9caa72b89078d8428b94' as 'thirdparty/spdlog'
2018-01-10 15:24:09 +01:00
a288295e43
created new repo for VILLASfpga
2017-11-21 21:28:21 +01:00
