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15 commits

Author SHA1 Message Date
IgnoreWarnings
977f1efbb4 ensure loading of vfio modules
Signed-off-by: IgnoreWarnings <pascal.bauer@rwth-aachen.de>
2024-08-08 17:53:55 +00:00
Niklas Eiling
21221eb698 fpga: fix empty search path being an error
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-05-29 09:18:00 +02:00
3d73c759ea Reformat all code with clang-format
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:34:27 +01:00
Niklas Eiling
4b7ed781c0 card: add API to create a single card
this is a preparation for allowing defining the card in the node config
rather than separately.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
897d916886 Core/Card: enable IP init requiring other IPs
add initialized IP to card->ips already during initialization so that
later IPs can use early initiliazed IPs to do their initilization.
E.g. Dino needs I2c for initialization.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
2967fb8ac9 fix fpga.cpp unit test failing due to changed DeviceList interface
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-12 14:08:34 +01:00
Niklas Eiling
654ee84e9e make FPGA device interface agnostic
remove explicit mentioning of PCIe in the use of Device as a preparation
for integrating platform devices. auto formatted some files.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-12 14:08:34 +01:00
Philipp Jungkamp
e2c2ec2c8b Fix fmt 10.0.0 related formatting errors.
Signed-off-by: Philipp Jungkamp <p.jungkamp@gmx.net>
2023-09-26 17:00:31 +02:00
Steffen Vogel
157d5b21d7 Make REUSE copyright notice the same as in other VILLASframework projects and fix comments (#82)
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework.

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

---------

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
2023-09-08 11:35:18 +02:00
Niklas Eiling
d273162f71 fix PCIeCardFactory looking for IP config file at the wrong location
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 11:29:32 +01:00
Niklas Eiling
d9e60e22b1 make it possible to specify a search path in PcieCard::make so we can use relative paths in config files
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 11:15:25 +01:00
Pascal Henry Bauer
85b2e8b030 removed duplicate implementation
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-02-10 13:34:20 +01:00
Niklas Eiling
c80e5c083d remove map and umapmemoryblock from PcieCard
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:26:11 +01:00
Pascal Henry Bauer
f81a1ddc6d moved destructor to base class
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-27 16:57:31 +01:00
Pascal Henry Bauer
3587ccc0fa change pciecard name to pcie_card
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Renamed from fpga/lib/pciecard.cpp (Browse further)