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10 commits

Author SHA1 Message Date
Niklas Eiling
a818bc0b64 combine functionalities of binaries into a single one
combine what was previously achieved by the separate binaries
villas-fpga-xbar-select and villas-fpga-cat into a single new
binary villas-fpga-ctl. Here we can select crossbar connections
via command line parameters. To avoid regression there are shell
scripts providing the old functionalities directly.

Currently the villas-fpga-pipe functionality is not supported,
because we still need to implement stdin input and routing that
to the fpga.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-04 17:16:35 +01:00
Pascal Bauer
56dcf9fac6 add comment to suppress casting warning
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
92ab5d078f remove aliases for smart pointers and lists
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-07 19:04:47 +01:00
Niklas Eiling
404bc9c8be fix throwing an error in villas-fpga-cat leading to abort, because of wrong deconstructor order
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-03 15:16:24 +01:00
Niklas Eiling
f26656a90d bump common subrepo, use debug logging in villas-fpga-cat
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-02 13:52:32 +01:00
Niklas Eiling
0d0aae090d add villas-fpga-xbar-select; improve DMA parameters in ips/dma 2022-11-29 14:51:54 +01:00
Niklas Eiling
6a900ba5e4 fix villas-fpga-cat interpreting floats wrong 2022-11-29 14:51:54 +01:00
Niklas Eiling
f105b08144 clean up and comment ips/dma.cpp 2022-11-29 14:51:53 +01:00
Niklas Eiling
34c8458500 villas-fpga-cat: fix double value being constructed wrong 2022-11-29 14:51:53 +01:00
Niklas Eiling
fb48e36a0b add villas-fpga-cat app that outputs a stream of data 2022-11-29 14:51:53 +01:00