mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
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108 lines
2.7 KiB
C++
108 lines
2.7 KiB
C++
/** Communicate with VILLASfpga Xilinx FPGA boards
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2014-2020, Institute for Automation of Complex Power Systems, EONERC
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* @license GNU General Public License (version 3)
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*
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* VILLASnode
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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/**
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* @addtogroup fpga BSD fpga Node Type
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* @ingroup node
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* @{
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*/
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#pragma once
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#include <villas/node/config.h>
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#include <villas/format.hpp>
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#include <villas/timing.h>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/node.hpp>
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#include <villas/fpga/ips/dma.hpp>
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/* Forward declarations */
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struct vnode;
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using namespace villas;
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#define FPGA_DMA_VLNV
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#define FPGA_AURORA_VLNV "acs.eonerc.rwth-aachen.de:user:aurora_axis:"
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struct fpga {
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int irqFd;
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int coalesce;
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bool polling;
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std::shared_ptr<villas::fpga::PCIeCard> card;
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std::shared_ptr<villas::fpga::ip::Dma> dma;
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std::shared_ptr<villas::fpga::ip::Node> intf;
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struct {
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villas::MemoryAccessor<uint32_t> mem;
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villas::MemoryBlock block;
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} in, out;
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// Config only
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std::string cardName;
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std::string intfName;
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std::string dmaName;
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};
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/** @see node_vtable::type_start */
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int fpga_type_start(villas::node::SuperNode *sn);
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/** @see node_type::type_stop */
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int fpga_type_stop();
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/** @see node_type::init */
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int fpga_init(struct vnode *n);
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/** @see node_type::destroy */
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int fpga_destroy(struct vnode *n);
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/** @see node_type::parse */
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int fpga_parse(struct vnode *n, json_t *json);
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/** @see node_type::print */
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char * fpga_print(struct vnode *n);
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/** @see node_type::check */
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int fpga_check();
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/** @see node_type::prepare */
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int fpga_prepare();
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/** @see node_type::start */
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int fpga_start(struct vnode *n);
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/** @see node_type::stop */
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int fpga_stop(struct vnode *n);
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/** @see node_type::write */
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int fpga_write(struct vnode *n, struct sample * const smps[], unsigned cnt);
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/** @see node_type::read */
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int fpga_read(struct vnode *n, struct sample * const smps[], unsigned cnt);
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/** @see node_type::poll_fds */
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int fpga_poll_fds(struct vnode *n, int fds[]);
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/** @} */
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