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https://git.rwth-aachen.de/acs/public/villas/node/
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32 lines
855 B
C++
32 lines
855 B
C++
/* Block RAM IP.
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*
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* Author: Daniel Krebs <github@daniel-krebs.net>
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* SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <villas/exceptions.hpp>
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#include <villas/fpga/ips/bram.hpp>
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using namespace villas;
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using namespace villas::fpga::ip;
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void BramFactory::parse(Core &ip, json_t *cfg) {
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CoreFactory::parse(ip, cfg);
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auto &bram = dynamic_cast<Bram &>(ip);
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json_error_t err;
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int ret = json_unpack_ex(cfg, &err, 0, "{ s: i }", "size", &bram.size);
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if (ret != 0)
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throw ConfigError(cfg, err, "", "Cannot parse BRAM config");
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}
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bool Bram::init() {
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allocator = std::make_unique<LinearAllocator>(getAddressSpaceId(memoryBlock),
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this->size, 0);
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return true;
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}
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static BramFactory f;
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